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參數(shù)資料
| 型號(hào)： | M54HCT164F1R |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Low Voltage Adjustable Precision Shunt Regulator 5-SOT-23 0 to 70 |
| 中文描述： | 8位國(guó)家知識(shí)產(chǎn)權(quán)局移位寄存器 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 252K |
| 代理商： | M54HCT164F1R |
M54HCT164
M74HCT164
February 1993
8 BIT SIPO SHIFT REGISTER
B1R
(Plastic Package)
ORDER CODES :
M54HCT164F1R
M74HCT164B1R
M74HCT164M1R
M74HCT164C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
.
HIGH SPEED
t
PD
= 20 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
= 4 mA (MIN.)
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OL
=
I
OH
= 4 mA(MIN)
.
COMPATIBLE WITHTTL OUTPUTS
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS164
DESCRIPTION
The M54/74HCT164 is a high speed CMOS 8 BIT
SIPO SHIFT REGISTER fabricated in silicon gate
C
2
MOStechnology.Ithas thesame highspeedper-
formance of LSTTL combined with true CMOS low
powerconsumption.
The HCT164 is an 8bit shift register with serial data
entry and an output from each of the eight stages.
Data isentered serially through one of two inputs (A
or B),either oftheseinputscan beused asan active
high enable for data entry through the other input.
An unused input must be high, or both inputs con-
nected together. Each low-to-high transition on the
clock input shifts data one place to the right and
entersintoQA,thelogicNANDofthetwodatainputs
(A
B),the data that existed before the rising clock
edge. A low level on the clear input overrides all
otherinputs and clearstheregister asynchronously,
forcing all Q outputs low.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HCT devices are designed to
directly interface HSC
2
MOS systems with TTL and
NMOS components. They are also plugin replace-
ments for LSTTL devices giving a reduction of
powerconsumption.
1/12
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