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參數(shù)資料
| 型號： | M54HC112D1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 鎖存器 |
| 英文描述： | HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大小： | 275K |
| 代理商： | M54HC112D1 |
1/11
March 2004
s
HIGH SPEED:
fMAX = 79MHz (TYP.) at VCC =6V
s
LOW POWER DISSIPATION:
ICC =2A(MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH =VNIL = 28% VCC (MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|= IOL =4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 112
s
SPACE GRADE-1: ESA SCC QUALIFIED
s
50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
s
NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
s
DEVICE FULLY COMPLIANT WITH
SCC-9203-051
DESCRIPTION
The M54HC112 is an high speed CMOS DUAL
J-K FLIP-FLOP WITH PRESET AND CLEAR
fabricated with silicon gate C2MOS technology.
The
M54HC112
dual
JK
flip-flop
features
individual J, K, clock, and asynchronous set and
clear inputs for each flip-flop. When the clock goes
high, the inputs are enabled and data will be
accepted. The logic level of the J and K inputs
may be allowed to change when the clock pulse is
high and the bistable will function as shown in the
truth table. Input data is transferred to the input on
the negative going edge of the clock pulse.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M54HC112
RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
PIN CONNECTION
ORDER CODES
PACKAGE
FM
EM
DILC
M54HC112D
M54HC112D1
FPC
M54HC112K
M54HC112K1
DILC-16
FPC-16
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M54HC11K1 | HC/UH SERIES, TRIPLE 3-INPUT AND GATE, CDFP14 |
| M54HC138K1 | HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16 |
| M54HC175K | HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16 |
| M54HC240K1 | HC/UH SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDFP20 |
| M54HC273K | HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDFP20 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M54HC112F1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DUAL J-K FLIP FLOP WITH PRESET AND CLEAR |
| M54HC112K | 制造商:STMicroelectronics 功能描述:LOGIC, 5VOLTSFLIP FLOPDUAL J-K FF + PRESET + CLEARFLAT-16 SO - Bulk |
| M54HC112K1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR |
| M54HC113 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DUAL J-K FLIP FLOP WITH PRESET |
| M54HC113F1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DUAL J-K FLIP FLOP WITH PRESET |
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