參數(shù)資料
型號(hào)： M50FW016N5G
廠商： 意法半導(dǎo)體
英文描述： 16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
中文描述： 16兆位的2Mb × 8，統(tǒng)一座3V電源閃存固件集線器
文件頁數(shù)： 44/45頁
文件大小： 673K
代理商： M50FW016N5G
M50FW016
8/45
SIGNAL DESCRIPTIONS
There are two different bus interfaces available on
this part. The active interface is selected before
power-up or during Reset using the Interface Con-
figuration Pin, IC.
The signals for each interface are discussed in the
Signal Descriptions section below. The supply sig-
nals are discussed in the Supply Signal Descrip-
tions section below.
Firmware Hub (FWH) Signal Descriptions
For the Firmware Hub (FWH) Interface see Figure
Input/Output Communications (FWH0-FWH3). All
Input and Output Communication with the memory
take place on these pins. Addresses and Data for
Bus Read and Bus Write operations are encoded
on these pins.
Input Communication Frame (FWH4). The
In-
put Communication Frame (FWH4) signals the
start of a bus operation. When Input Communica-
tion Frame is Low, VIL, on the rising edge of the
Clock a new bus operation is initiated. If Input
Communication Frame is Low, VIL, during a bus
operation then the operation is aborted. When In-
put Communication Frame is High, VIH, the cur-
rent bus operation is proceeding or the bus is idle.
Identification Inputs (ID0-ID3). The
Identification Inputs select the address that the
memory responds to. Up to 16 memories can be
addressed on a bus. For an address bit to be ‘0’
the pin can be left floating or driven Low, VIL; an
internal pull-down resistor is included with a value
of RIL. For an address bit to be ‘1’ the pin must be
driven High, VIH; there will be a leakage current of
ILI2 through each pin when pulled to VIH; see Table
By convention the boot memory must have
address ‘0000’ and all additional memories take
sequential addresses starting from ‘0001’.
By convention the boot memory must have ID0-
ID3 pins left floating or driven Low, VIL and a ‘1’
value
on
A21, A23-A25
and
all
additional
memories take sequential ID0-ID3 configuration.
General Purpose Inputs (FGPI0-FGPI4). The Gen-
eral Purpose Inputs can be used as digital inputs
for the CPU to read. The General Purpose Input
Register holds the values on these pins. The pins
must have stable data from before the start of the
cycle that reads the General Purpose Input Regis-
ter until after the cycle is complete. These pins
must not be left to float, they should be driven Low,
VIL, or High, VIH.
Interface Configuration (IC). The Interface Con-
figuration input selects whether the Firmware Hub
(FWH) or the Address/Address Multiplexed (A/A
Mux) Interface is used. The chosen interface must
be selected before power-up or during a Reset
and, thereafter, cannot be changed. The state of
the Interface Configuration, IC, should not be
changed during operation.
To select the Firmware Hub (FWH) Interface the
Interface Configuration pin should be left to float or
driven Low, VIL; to select the Address/Address
Multiplexed (A/A Mux) Interface the pin should be
driven High, VIH. An internal pull-down resistor is
included with a value of RIL; there will be a leakage
current of ILI2 through each pin when pulled to VIH;
Interface Reset (RP). The Interface Reset (RP)
input is used to reset the memory. When Interface
Reset (RP) is set Low, VIL, the memory is in Reset
mode: the outputs are put to high impedance and
the current consumption is minimized. When RP is
set High, VIH, the memory is in normal operation.
After exiting Reset mode, the memory enters
Read mode.
CPU Reset (INIT). The CPU Reset, INIT, pin is
used to Reset the memory when the CPU is reset.
It behaves identically to Interface Reset, RP, and
the internal Reset line is the logical OR (electrical
AND) of RP and INIT.
Clock (CLK). The Clock, CLK, input is used to
clock the signals in and out of the Input/Output
Communication Pins, FWH0-FWH3. The Clock
conforms to the PCI specification.
Top Block Lock (TBL). The
Top
Block
Lock
input is used to prevent the Top Block (Block 31)
from being changed. When Top Block Lock, TBL,
is set Low, VIL, Program and Block Erase
operations in the Top Block have no effect,
regardless of the state of the Lock Register. When
Top Block Lock, TBL, is set High, VIH, the
protection of the Block is determined by the Lock
Register. The state of Top Block Lock, TBL, does
not affect the protection of the Main Blocks (Blocks
0 to 30).
Top Block Lock, TBL, must be set prior to a Pro-
gram or Block Erase operation is initiated and
must not be changed until the operation completes
or unpredictable results may occur. Care should
be taken to avoid unpredictable behavior by
changing TBL during Program or Erase Suspend.
Write Protect (WP). The Write Protect input is
used to prevent the Main Blocks (Blocks 0 to 30)
from being changed. When Write Protect, WP, is
set Low, VIL, Program and Block Erase operations
in the Main Blocks have no effect, regardless of
the state of the Lock Register. When Write Protect,
相關(guān)PDF資料
PDF描述
M50FW080K1 8 Mbit 1Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
M50FW080K1G 8 Mbit 1Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
M50FW080NB5T 8 Mbit 1Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
M50FW080NB5TG 8 Mbit 1Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
M524-012.8M TCVCXO, CLOCK, 12.8 MHz, CMOS OUTPUT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M50FW016N5T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
M50FW016N5TG 功能描述:閃存 SERIAL FLASH RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
M50FW040 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
M50FW040_06 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory
M50FW040K 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*