參數(shù)資料
型號(hào): M50FW016N5G
廠商: 意法半導(dǎo)體
英文描述: 16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
中文描述: 16兆位的2Mb × 8,統(tǒng)一座3V電源閃存固件集線(xiàn)器
文件頁(yè)數(shù): 27/45頁(yè)
文件大?。?/td> 673K
代理商: M50FW016N5G
33/45
M50FW016
Figure 13. A/A Mux Interface Read AC Waveforms
Table 25. A/A Mux Interface Read AC Characteristics
Note: 1. G may be delayed up to tCHQV – tGLQV after the rising edge of RC without impact on tCHQV.
Symbol
Parameter
Test Condition
Value
Unit
tAVAV
Read Cycle Time
Min
250
ns
tAVCL
Row Address Valid to RC Low
Min
50
ns
tCLAX
RC Low to Row Address Transition
Min
50
ns
tAVCH
Column Address Valid to RC high
Min
50
ns
tCHAX
RC High to Column Address Transition
Min
50
ns
tCHQV
(1)
RC High to Output Valid
Max
150
ns
tGLQV
(1)
Output Enable Low to Output Valid
Max
50
ns
tPHAV
RP High to Row Address Valid
Min
1
s
tGLQX
Output Enable Low to Output Transition
Min
0
ns
tGHQZ
Output Enable High to Output Hi-Z
Max
50
ns
tGHQX
Output Hold from Output Enable High
Min
0
ns
AI03406
tAVAV
tCLAX
tCHAX
tGLQX
tGLQV
tGHQX
VALID
A0-A10
G
DQ0-DQ7
RC
tCHQV
tGHQZ
COLUMN ADDR VALID
W
RP
tPHAV
ROW ADDR VALID
NEXT ADDR VALID
tAVCL
tAVCH
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