參數(shù)資料
型號(hào)： M50FLW080AN5T
廠商： STMICROELECTRONICS
元件分類(lèi)： PROM
英文描述： 1M X 8 FLASH 3V PROM, 11 ns, PDSO40
封裝： 10 X 20 MM, PLASTIC, TSOP-40
文件頁(yè)數(shù)： 4/53頁(yè)
文件大小： 945K
代理商： M50FLW080AN5T
M50FLW080A, M50FLW080B
12/53
Table 5. Memory Identification Input Configuration (LPC mode)
BUS OPERATIONS
The two interfaces, A/A Mux and FWH/LPC, sup-
port similar operations, but with different bus sig-
nals and timings. The Firmware Hub/Low Pin
Count (FWH/LPC) Interface offers full functional-
ity, while the Address/Address Multiplexed (A/A
Mux) Interface is orientated for erase and program
operations.
See the sections below, The Firmware Hub/Low
tions, for details of the bus operations on each
interface.
Firmware Hub/Low Pin Count (FWH/LPC) Bus
Operations
The M50FLW080 automatically identifies the type
of FWH/LPC protocol from the first received nibble
(START nibble) and decodes the data that it re-
ceives afterwards, according to the chosen FWH
or LPC mode. The Firmware Hub/Low Pin Count
(FWH/LPC) Interface consists of four data signals
(FWH0/LAD0-FWH3/LAD3),
one
control
line
(FWH4/LFRAME) and a clock (CLK).
Protection against accidental or malicious data
corruption is achieved using two additional signals
(TBL and WP). And two reset signals (RP and
INIT) are available to put the memory into a known
state.
The data, control and clock signals are designed
to be compatible with PCI electrical specifications.
The interface operates with clock speeds of up to
33MHz.
The following operations can be performed using
the appropriate bus cycles: Bus Read, Bus Write,
Standby, Reset and Block Protection.
Bus Read. Bus Read operations are used to read
from the memory cells, specific registers in the
Command Interface or Firmware Hub/Low Pin
Count Registers. A valid Bus Read operation
starts on the rising edge of the Clock signal when
the
Input
Communication
Frame,
FWH4/
LFRAME, is Low, VIL, and the correct Start cycle
is present on FWH0/LAD0-FWH3/LAD3. On sub-
sequent clock cycles the Host will send to the
memory:
■
ID Select, Address and other control bits on
FWH0-FWH3 in FWH mode.
■
Type+Dir Address and other control bits on
LAD0-LAD3 in LPC mode.
The device responds by outputting Sync data until
the wait states have elapsed, followed by Data0-
Data3 and Data4-Data7.
ure 9., for a description of the Field definitions for
each clock cycle of the transfer. See Table 26.,
and Figure 15., for details on the timings of the sig-
nals.
Bus Write. Bus Write operations are used to write
to the Command Interface or Firmware Hub/Low
Pin Count Registers. A valid Bus Write operation
starts on the rising edge of the Clock signal when
Input Communication Frame, FWH4/LFRAME, is
Low, VIL, and the correct Start cycle is present on
FWH0/LAD0-FWH3/LAD3. On subsequent Clock
cycles the Host will send to the memory:
■
ID Select, Address, other control bits, Data0-
Data3 and Data4-Data7 on FWH0-FWH3 in
FWH mode.
■
Cycle Type + Dir, Address, other control bits,
Data0-Data3 and Data4-Data7 on LAD0-
LAD3.
The device responds by outputting Sync data until
the wait states have elapsed.
ure 10., for a description of the Field definitions for
each clock cycle of the transfer. See Table 26.,
and Figure 15., for details on the timings of the sig-
nals.
Bus Abort. The Bus Abort operation can be used
to abort the current bus operation immediately. A
Bus Abort occurs when FWH4/LFRAME is driven
Low, VIL, during the bus operation. The device
puts
the
Input/Output
Communication
pins,
FWH0/LAD0-FWH3/LAD3, to high impedance.
Memory Number
ID3
ID2
A21
A20
1 (Boot memory)
VIL or float
11
2
VIL or float
VIH
10
3
VIH
VIL or float
01
4
VIH
00
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M50FLW080AN5TP 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory
M50FLW080ANB5 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory
M50FLW080ANB5G 功能描述:閃存 8Mbit 3V Firmwre Hub Low pin-count flash RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類(lèi)型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類(lèi)型: 接口類(lèi)型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
M50FLW080ANB5P 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory
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