參數(shù)資料
型號: M50FLW040AK5TG
廠商: 意法半導體
英文描述: 4-Mbit (5 】 64 Kbyte blocks + 3 】 16 】 4 Kbyte sectors) 3-V supply Firmware Hub / low-pin count Flash memory
中文描述: 4兆位(5】64字節(jié)塊3】16】4 Kbyte的)3 - V電源供電固件集線器/低引腳數(shù)的閃存
文件頁數(shù): 47/64頁
文件大?。?/td> 338K
代理商: M50FLW040AK5TG
M50FLW040A, M50FLW040B
DC and AC parameters
47/64
Figure 17.
A/A Mux interface Write AC waveforms
A/A Mux interface Write AC characteristics
AI04185
tCLAX
tCHAX
tWHDX
tDVWH
VALID SRD
A0-A10
G
DQ0-DQ7
RC
tCHWH
tWHRL
C1
W
R1
tAVCL
tAVCH
R2
C2
tWLWH
tWHWL
RB
VPP
tVPHWH
tWHGL
tQVVPL
DIN1
DIN2
Write erase or
program setup
Write erase confirm or
valid address and data
Automated erase
or program delay
Read Status
Register Data
Ready to write
another command
Table 29.
Symbol
Parameter
Test Condition
Value
Unit
t
WLWH
Write Enable Low to Write Enable High
Min
100
ns
t
DVWH
Data Valid to Write Enable High
Min
50
ns
t
WHDX
Write Enable High to Data Transition
Min
5
ns
t
AVCL
Row Address Valid to RC Low
Min
50
ns
t
CLAX
RC Low to Row Address Transition
Min
50
ns
t
AVCH
Column Address Valid to RC High
Min
50
ns
t
CHAX
RC High to Column Address Transition
Min
50
ns
t
WHWL
Write Enable High to Write Enable Low
Min
100
ns
t
CHWH
t
VPHWH(1)
RC High to Write Enable High
Min
50
ns
V
PP
High to Write Enable High
Min
100
ns
t
WHGL
Write Enable High to Output Enable Low
Min
30
ns
t
WHRL
t
QVVPL(1),(2)
Write Enable High to RB Low
Min
0
ns
Output Valid, RB High to V
PP
Low
Min
0
ns
1.
Sampled only, not 100% tested.
2.
Applicable if V
PP
is seen as a logic input (V
PP
< 3.6V).
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M50FLW040AK5TP 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4-Mbit (5 】 64 Kbyte blocks + 3 】 16 】 4 Kbyte sectors) 3-V supply Firmware Hub / low-pin count Flash memory
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