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參數(shù)資料
| 型號(hào)： | M48T559YMH1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.330 INCH, PLASTIC, SOH-28 |
| 文件頁數(shù)： | 23/26頁 |
| 文件大?。?/td> | 364K |
| 代理商： | M48T559YMH1 |
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M48T559Y
6/26
OPERATION MODES
As Figure 4., page 5 shows, the static memory ar-
ray and the quartz controlled clock oscillator of the
M48T559Y are integrated on one silicon chip. The
two circuits are interconnected at the upper eight
memory locations to provide user accessible
BYTEWIDE clock information in the bytes with
addresses 1FF8h-1FFFh. The clock locations
contain the year, month, date, day, hour, minute,
and second in 24 hour BCD format. Corrections for
28, 29 (leap year - valid until 2100), 30, and 31 day
months are made automatically. Byte 1FF8h is the
clock control register. This byte controls user ac-
cess to the clock information and also stores the
clock calibration setting.
The eight clock bytes are not the actual clock
counters themselves; they are memory locations
consisting of BiPORT READ/WRITE memory
cells.
The M48T559Y includes a clock control circuit
which updates the clock bytes with current infor-
mation once per second. The information can be
accessed by the user in the same manner as any
other location in the static memory array.
The M48T559Y also has its own Power-fail Detect
circuit. The control circuitry constantly monitors
the single 5V supply for an out of tolerance condi-
tion.
When VCC is out-of-tolerance, the circuit write pro-
tects the SRAM, providing a high degree of data
security in the midst of unpredictable system oper-
ation brought on by low VCC. As VCC falls below
the Battery Back-up Switchover Voltage (VSO), the
control circuitry connects the battery which main-
tains data and clock operation until valid power re-
turns.
Table 2. Operating Modes
Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage
1. See Table 12., page 20 for details.
2. AD0-AD7, AS0, AS1 active when E is high and VCC > VPFD.
Mode
VCC
E
R
W
AD0-AD7(2)
Power
Deselect
4.5 to 5.5V
VIH
X
High Z
Standby
WRITE
VIL
VIH
VIL
DIN
Active
READ
VIL
VIH
DOUT
Active
READ
VIL
VIH
High Z
Active
Deselect
VSO to VPFD (min)
(1)
X
High Z
CMOS Standby
Deselect
≤ VSO(1)
X
High Z
Battery Back-up Mode
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T559Y-MH1 | 功能描述:RAM其它 8KX8 TIMEKEEPR RoHS:否 制造商:Freescale Semiconductor 封裝:Tray |
| M48T559YMH1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x8 TIMEKEEPER SRAM with ADDRESS/DATA MULTIPLEXED |
| M48T559YSH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x8 TIMEKEEPER SRAM with ADDRESS/DATA MULTIPLEXED |
| M48T58 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAM |
| M48T58_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAM |
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