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| 型號： | M44C890 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Low-Current Microcontroller for Wireless Communication |
| 中文描述： | 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | SSO-20 |
| 文件頁數(shù)： | 42/63頁 |
| 文件大?。?/td> | 503K |
| 代理商： | M44C890 |
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M44C890
M44C090
Rev.A4, 14-Dec-01
42 (63)
7 6 5 4 3 2 1
7 6 5 4 3 2 1 0 A
msb
lsb
tx data 1
rx data 2
msb
lsb
Write STB
(tx data 1)
SC
SD
SRDY
ACT
Interrupt
(IFN = 0)
Interrupt
(IFN = 1)
13827
0 A
Read SRB
(rx data 2)
SIR
SDD
Start
Stop
Figure 48. Example of I
2
C receive dialog
8-bit Pseudo I
2
C Mode
In this mode, the SSI exhibits all the typical I
2
C opera-
tional features except for the acknowledge-bit which is
never expected or transmitted.
I
2
C Bus Protocol
The I
2
C protocol constitutes a simple 2-wire bidirectional
communication highway via which devices can
communicate control and data information. Although the
I
2
C
protocol
can
support
configurations, the SSI, in I
2
C mode is intended for use
purely as a master controller on a single master bus
system. So all reference to multiple bus control and bus
contention will be omitted at this point.
multi-master
bus
All data is packaged into 8-bit telegrams plus a trailing
handshaking
or
acknowledge-bit.
Normally
the
communication channel is opened with a so-called start
condition, which initializes all devices connected to the
bus. This is then followed by a data telegram, transmitted
by the master controller device. This telegram usually
contains an 8-bit address code to activate a single slave
device connected onto the I
2
C bus. Each slave receives
this address and compares it with it
’
s own unique address.
The addressed slave device, if ready to receive data will
respond by pulling the SD line low during the 9th clock
pulse. This represents a so-called I
2
C acknowledge. The
controller on detecting this affirmative acknowledge then
opens a connection to the required slave. Data can then be
passed back and forth by the master controller, each 8-bit
telegram being acknowledged by the respective recipient.
The communication is finally closed by the master device
and the slave device put back into standby by applying a
stop condition onto the bus.
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