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參數(shù)資料
| 型號(hào)： | M41T256YMT7TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
| 封裝： | 0.330 INCH, PLASTIC, SOIC-44 |
| 文件頁數(shù)： | 5/27頁 |
| 文件大小： | 523K |
| 代理商： | M41T256YMT7TR |
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13/27
M41T256Y
CLOCK OPERATION
Year, Month, and Date are contained in the last
three registers of the TIMEKEEPER Register
Map (see Table 3., page 14). Bits D0 through D2
of the next register contain the Day (day of week).
Finally, there are the registers containing the Sec-
onds, Minutes, and Hours, respectively. The first
clock register is the Control Register (this is de-
scribed in the Clock Calibration section).
The nine Clock Registers may be read one byte at
a time, or in a sequential block. The Control Reg-
ister (Address location 7FF8h) may be accessed
independently. Provision has been made to as-
sure that a clock update does not occur while any
of the nine clock addresses are being read. If a
clock address is being read, an update of the clock
registers will be halted. This will prevent a transi-
tion of data during the read.
Reading the Clock
The
nine
byte
clock
register
(see
3., page 14) is used to both set the clock and to
read the date and time from the clock, in a binary
coded decimal format. The system-to-user trans-
fer of clock data will be halted whenever the ad-
dress being read is a clock address (7FF9h to
7FFFh). The update will resume either due to a
Stop Condition or when the pointer increments to
a RAM address.
This prevents reading data in transition. The
TIMEKEEPER cells in the Register Map are only
data registers and not actual clock counters, so
updating the registers can be halted without dis-
turbing the clock itself.
Setting the Clock
Bit D7 of the Control Register (7FF8h) is the Write
Clock Bit. Setting the Write Clock Bit to a '1' will al-
low the user to write the desired Day, Date, and
Time data in 24-hour BCD format. Resetting the
Write Clock Bit to a '0' then transfers the values of
all time registers (7FF8h-7FFFh) to the actual
clock counters and resets the internal divider (or
clock) chain.
Note: The Tenths/Hundredths of Seconds Regis-
ter will automatically be reset to zero when the
WRITE Clock Bit is set.
Other register bits such as FT, TEB, and ST may
be written without setting the WC Bit. In such cas-
es, the clock data will be undisturbed and will re-
tain their previous values.
Stopping and Starting the Oscillator
The oscillator may be stopped at any time. If the
device is going to spend a significant amount of
time on the shelf, the oscillator can be turned off to
minimize current drain on the battery. The Stop Bit
(ST) is the most significant bit of the Seconds Reg-
ister. Setting it to '1' stops the oscillator. Setting it
to '0' restarts the oscillator in approximately one
second.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| M41T256YSH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Kbit 32K x8 SERIAL RTC |
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| M41T315V-65MH6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial Access Phantom RTC Supervisor |
| M41T315V-65MH6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial access phantom RTC supervisor |
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