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參數(shù)資料
| 型號(hào)： | M41T256YMT7TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
| 封裝： | 0.330 INCH, PLASTIC, SOIC-44 |
| 文件頁數(shù)： | 27/27頁 |
| 文件大?。?/td> | 523K |
| 代理商： | M41T256YMT7TR |
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M41T256Y
READ Mode
In this mode the master reads the M41T256Y
slave after setting the slave address (see Figure
10., page 9). Following the WRITE Mode Control
Bit (R/W=0) and the Acknowledge Bit, the byte ad-
dresses A(0) and A(1) are written to the on-chip
address pointer (MSB of address byte A(0) is a
“Don’t care”). Next the START condition and slave
address are repeated followed by the READ Mode
Control Bit (R/W=1). At this point the master trans-
mitter becomes the master receiver. The data byte
which was addressed will be transmitted and the
master receiver will send an acknowledge bit to
the slave transmitter. The address pointer is only
incremented on reception of an Acknowledge
Clock. The M41T256Y slave transmitter will now
place the data byte at address An+1 on the bus,
the master receiver reads and acknowledges the
new byte and the address pointer is incremented
to An+2.
This cycle of reading consecutive addresses will
continue until the master receiver sends a STOP
condition to the slave transmitter (see Figure
Note: Address pointer will wrap around from max-
imum address to minimum address if consecutive
READ or WRITE cycles are performed.
An alternate READ Mode may also be implement-
ed whereby the master reads the M41T256Y slave
without first writing to the (volatile) address point-
er. The first address that is read is the last one
stored in the pointer (see Figure 12., page 10).
Figure 10. Slave Address Location
Note: The most significant bit is sent first.
AI00602
R/W
SLAVE ADDRESS
START
A
0
100
0
11
MSB
LSB
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| M41T256YSH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Kbit 32K x8 SERIAL RTC |
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| M41T315V-65MH6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial access phantom RTC supervisor |
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