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參數資料
| 型號： | M41ST95YMX6 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時鐘/數據恢復及定時提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SOIC-28 |
| 文件頁數： | 2/35頁 |
| 文件大?。?/td> | 735K |
| 代理商： | M41ST95YMX6 |
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Obsolete
Product(s)
- Obsolete
Product(s)
M41ST95Y*, M41ST95W
10/35
Signal Description
Serial Data Output (SDO). The
output
pin
is
used to transfer data serially out of the Memory.
Data is shifted out on the falling edge of the serial
clock.
Serial Data Input (SDI). The input pin is used to
transfer data serially into the device. Instructions,
addresses, and the data to be written, are each re-
ceived this way. Input is latched on the rising edge
of the serial clock.
Serial Clock (SCL). The serial clock provides the
timing for the serial interface (as shown in Figure
9., page 11 and Figure 10., page 11). The W/R
Bit, addresses, or data are latched, from the input
pin, on the rising edge of the clock input. The out-
put data on the SDO pin changes state after the
falling edge of the clock input.
The M41ST95Y/W can be driven by a microcon-
troller with its SPI peripheral running in either of
the two following modes:
(CPOL, CPHA) = ('0', '0') or
(CPOL, CPHA) = ('1', '1').
For these two modes, input data (SDI) is latched in
by the low-to-high transition of clock SCL, and out-
put data (SDO) is shifted out on the high-to-low
Chip Enable (E). When E is high, the memory
device is deselected, and the SDO output pin is
held in its high impedance state.
After power-on, a high-to-low transition on E is re-
quired prior to the start of any operation.
Table 2. Function Table
Note: 1. SDO remains at High Z until eight bits of data are ready to be shifted out during a READ.
Figure 8. Data and Clock Timing
Mode
E
SCL
SDI
SDO
Disable Reset
H
Input Disabled
High Z
WRITE
L
Data Bit latch
High Z
READ
L
X
Next data bit shift (1)
AI04630
AI04631
AI06368
SCL
MSB
LSB
CPHA
SDI
0
1
CPOL
0
1
MSB
LSB
SDO
相關PDF資料 |
PDF描述 |
|---|---|
| M41T00CAPPC1 | REAL TIME CLOCK, PDIP24 |
| M41T0DW6F | REAL TIME CLOCK, PDSO8 |
| M41T0DW6 | 0 TIMER(S), REAL TIME CLOCK, PDSO8 |
| M41T0DW6TR | 0 TIMER(S), REAL TIME CLOCK, PDSO8 |
| M41T0M6F | REAL TIME CLOCK, PDSO8 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| M41ST95YMX6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit (64 bit X 8) Serial RTC (SPI) SRAM and NVRAM Supervisor |
| M41ST95YMX6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit (64 bit X 8) Serial RTC (SPI) SRAM and NVRAM Supervisor |
| M41ST95YMX6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit (64 bit X 8) Serial RTC (SPI) SRAM and NVRAM Supervisor |
| M41T0 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SERIAL REAL-TIME CLOCK |
| M41T0_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Serial real-time clock |
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