參數(shù)資料
型號(hào): M41ST95YMX6
廠商: STMICROELECTRONICS
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO28
封裝: 0.300 INCH, PLASTIC, SOIC-28
文件頁(yè)數(shù): 14/35頁(yè)
文件大?。?/td> 735K
代理商: M41ST95YMX6
Obsolete
Product(s)
- Obsolete
Product(s)
21/35
M41ST95Y*, M41ST95W
Power-on Reset
The M41ST95Y/W continuously monitors VCC.
When VCC falls to the power fail detect trip point,
the RST pulls low (open drain) and remains low on
power-up for tREC after VCC passes VPFD (max).
The RST pin is an open drain output and an appro-
priate pull-up resistor should be chosen to control
rise time.
Reset Input (RSTIN1 and RSTIN2)
The M41ST95Y/W provides two independent in-
puts which can generate an output reset. The du-
ration and function of these resets is identical to a
reset generated by a power cycle. Table 7 and Fig-
ure 16 illustrate the AC reset characteristics of this
function. Pulses shorter than tRLRH1 and tRLRH2
will not generate a reset condition. RSTIN1 and
RSTIN2 are each internally pulled up to VCC
through a 100k
resistor.
Figure 16. RSTIN1 and RSTIN2 Timing Waveforms
Note: 1. Open Drain Output
Table 7. Reset AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V or 2.7 to 3.6V (except where noted).
2. Pulse width less than 50ns will result in no RESET (for noise immunity).
3. Pulse width less than 20ms will result in no RESET (for noise immunity).
4. Programmable (see Table 8., page 23)
5. After crystal oscillator has started
Symbol
Parameter(1)
Min
Max
Unit
tRLRH1
(2)
RSTIN1 Low to RSTIN1 High
200
ns
tRLRH2
(3)
RSTIN2 Low to RSTIN2 High
100
ms
tR1HRH
(4)
RSTIN1 High to RST High
96
98
ms
tR2HRH
(4,5)
RSTIN2 High to RST High
96
98
ms
AI03665
RSTIN2
RST
(1)
RSTIN1
tRLRH1
tRLRH2
tR1HRH
tR2HRH
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