參數(shù)資料
型號(hào): M41ST95YMX6
廠商: STMICROELECTRONICS
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO28
封裝: 0.300 INCH, PLASTIC, SOIC-28
文件頁數(shù): 15/35頁
文件大?。?/td> 735K
代理商: M41ST95YMX6
Obsolete
Product(s)
- Obsolete
Product(s)
M41ST95Y*, M41ST95W
22/35
Power-fail INPUT/OUTPUT
The Power-Fail Input (PFI) is compared to an in-
ternal reference voltage (1.25V). If PFI is less than
the power-fail threshold (VPFI), the Power-Fail
Output (PFO) will go low. This function is intended
for use as an under-voltage detector to signal a
failing power supply. Typically PFI is connected
through an external voltage divider (see Figure 17)
to either the unregulated DC input (if it is available)
or the regulated output of the VCC regulator. The
voltage divider can be set up such that the voltage
at PFI falls below VPFI several milliseconds before
the regulated VCC input to the M41ST95Y/W or the
microprocessor drops below the minimum operat-
ing voltage.
During battery back-up, the power-fail comparator
turns off and PFO goes (or remains) low. This oc-
curs after VCC drops below VPFD(min). When pow-
er returns, PFO is forced high, irrespective of VPFI
for the write protect time (tREC), which is the time
from VPFD(max) until the inputs are recognized. At
the end of this time, the power-fail comparator is
enabled and PFO follows PFI. If the comparator is
unused, PFI should be connected to VSS and PFO
left unconnected.
Figure 17. Power-Fail Comparator Hookup
Note: 1. Available only in 28-pin, 300mil SOIC (MX) package.
AI06373
VCC
VOUT
VCC
PFO
SDI
SCL
M41ST95Y/W
WDI
RSTIN2
RSTIN1
PFI
VSS
VBAT
IRQ/FT/OUT
SQW
RST
SDO
Unregulated
Voltage
Regulator
VCC
VIN
E
EX
ECON
Pushbutton
Reset
From
MCU
To RST
To LED Display
To NMI
To INT
F32k
(1)
R1
R2
VCC
E
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