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參數(shù)資料
| 型號： | M41ST95W |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 5.0 or 3.0V, 512 bit (64 bit x8) Serial RTC (SPI) SRAM and NVRAM Supervisor(5.0/3.0V, 512位(64位x8)串行RTC(SPI) SRAM和NVRAM監(jiān)控電路) |
| 中文描述： | 5.0或3.0V，512位（64位× 8）串行時鐘（SPI）的靜態(tài)存儲器和NVRAM主管（5.0/3.0V，512位（64位× 8）串行時鐘（SPI）的靜態(tài)存儲器和NVRAM中監(jiān)控電路） |
| 文件頁數(shù)： | 23/35頁 |
| 文件大?。?/td> | 602K |
| 代理商： | M41ST95W |
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M41ST95Y*, M41ST95W
Century Bit
Bits D7 and D6 of Clock Register 03h contain the
CENTURY ENABLE Bit (CEB) and the CENTURY
Bit (CB). Setting CEB to a '1' will cause CB to tog-
gle, either from a '0' to '1' or from '1' to '0' at the turn
of the century (depending upon its initial state). If
CEB is set to a '0,' CB will not toggle.
Output Driver Pin
When the FT Bit, AFE Bit and Watchdog Register
are not set, the IRQ/FT/OUT pin becomes an out-
put driver that reflects the contents of D7 of the
Control Register. In other words, when D7 (OUT
Bit) and D6 (FT Bit) of address location 08h are a
'0,' then the IRQ/FT/OUT pin will be driven low.
Note:
The IRQ/FT/OUT pin is an open drain which
requires an external pull-up resistor.
Battery Low Warning
The M41ST95Y/W automatically performs battery
voltage monitoring upon power-up and at factory-
programmed time intervals of approximately 24
hours. The Battery Low (BL) Bit, Bit D4 of Flags
Register 0Fh, will be asserted if the battery voltage
is found to be less than approximately 2.5V. The
BL Bit will remain asserted until completion of bat-
tery replacement and subsequent battery low
monitoring tests, either during the next power-up
sequence or the next scheduled 24-hour interval.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below ap-
proximately 2.5 volts and may not be able to
maintain data integrity in the SRAM. Data should
be considered suspect and verified as correct. A
fresh battery should be installed.
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
promised due to the fact that a nominal V
CC
is
supplied. In order to insure data integrity during
subsequent periods of battery back-up mode, the
battery should be replaced. The SNAPHAT
top
may be replaced while V
CC
applied to the device.
The M41ST95Y/W only monitors the battery when
a nominal V
CC
is applied to the device. Thus appli-
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique.
t
REC
Bit
Bit D7 of Clock Register 04h contains the t
REC
Bit
(TR). t
REC
refers to the automatic continuation of
the deselect time after V
CC
reaches V
PFD
. This al-
lows for a voltage setting time before WRITEs may
again be performed to the device after a power-
down condition. The t
REC
Bit will allow the user to
set the length of this deselect time as defined by
Table
8
.
Preferred Power-on Defaults
Upon initial application of power to the device, the
following register bits are set to a '0' state: Watch-
dog Register, TR, FT, AFE, ABE, and SQWE. The
following bits are set to a '1' state: OUT and HT
(see Table
9
).
Table 8. t
REC
Definitions
Note: 1. Default Setting; after oscillator has started
Table 9. Default Values
Note: 1. WDS, BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. UC = Unchanged.
t
REC
Bit (TR)
STOP Bit (ST)
t
REC
Time
Units
Min
Max
0
0
96
98
(1)
ms
0
1
40
200
ms
1
X
50
2000
μs
Condition
TR
ST
HT
Out
FT
AFE
ABE
SQWE
WATCHDOG
Register
(1)
Initial Power-up (Battery Attach
for SNAPHAT)
(2)
0
0
1
1
0
0
0
0
0
Subsequent power-up (with
battery back-up)
(3)
UC
UC
1
UC
0
0
0
0
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M41ST95WMH6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit (64 bit X 8) Serial RTC (SPI) SRAM and NVRAM Supervisor |
| M41ST95WMH6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit (64 bit X 8) Serial RTC (SPI) SRAM and NVRAM Supervisor |
| M41ST95WMH6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit (64 bit X 8) Serial RTC (SPI) SRAM and NVRAM Supervisor |
| M41ST95WMH6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit (64 bit X 8) Serial RTC (SPI) SRAM and NVRAM Supervisor |
| M41ST95WMX6 | 功能描述:實時時鐘 Serial 512 (64x8) RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
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