- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359060 > M41ST85 (意法半導(dǎo)體) 5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR PDF資料下載
參數(shù)資料
| 型號： | M41ST85 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR |
| 中文描述： | 5.0或3.0V，512位64 × 8串行時鐘和NVRAM督導(dǎo)員 |
| 文件頁數(shù)： | 15/33頁 |
| 文件大?。?/td> | 464K |
| 代理商： | M41ST85 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁
15/33
M41ST85Y, M41ST85W
Data Retention Mode
With valid V
CC
applied, the M41ST85Y/W can be
accessed as described above with READ or
WRITE Cycles. Should the supply voltage decay,
the M41ST85Y/W will automatically deselect,
write protecting itself (and any external SRAM)
when V
CC
falls between V
PFD
(max) and
V
PFD
(min). This is accomplished by internally in-
hibiting access to the clock registers. At this time,
the Reset pin (RST) is driven active and will re-
main active until V
CC
returns to nominal levels. Ex-
ternal RAM access is inhibited in a similar manner
by forcing E
CON
to a high level. This level is within
0.2 volts of the V
BAT
. E
CON
will remain at this level
as long as V
CC
remains at an out-of-tolerance con-
dition. When V
CC
falls below the Battery Back-up
Switchover Voltage (V
SO
), power input is switched
from the V
CC
pin to the SNAPHAT
battery, and
the clock registers and external SRAM are main-
tained from the attached battery supply.
All outputs become high impedance. The V
OUT
pin
is capable of supplying 100 μA of current to the at-
tached memory with less than 0.3 volts drop under
this condition. On power up, when V
CC
returns to
a nominal value, write protection continues for
t
REC
by inhibiting E
CON
. The RST signal also re-
mains active during this time (see Figure 17, page
16).
Note:
Most low power SRAMs on the market to-
day can be used with the M41ST85Y/W RTC SU-
PERVISOR. There are, however some criteria
which should be used in making the final choice of
an SRAM to use. The SRAM must be designed in
a way where the chip enable input disables all oth-
er inputs to the SRAM. This allows inputs to the
M41ST85Y/W and SRAMs to be “Don’t Care”
once V
CC
falls below V
PFD
(min). The SRAM
should also guarantee data retention down to
V
CC
=2.0 volts. The chip enable access time must
be sufficient to meet the system needs with the
chip enable output propagation delays included. If
the SRAM includes a second chip enable pin (E2),
this pin should be tied to V
OUT
.
If data retention lifetime is a critical parameter for
the system, it is important to review the data reten-
tion current specifications for the particular
SRAMs being evaluated. Most SRAMs specify a
data retention current at 3.0 volts. Manufacturers
generally specify a typical condition for room tem-
perature along with a worst case condition (gener-
ally at elevated temperatures). The system level
requirements will determine the choice of which
value to use. The data retention current value of
the SRAMs can then be added to the I
BAT
value of
the M41ST85Y/W to determine the total current re-
quirements for data retention. The available bat-
tery capacity for the SNAPHAT
of your choice
can then be divided by this current to determine
the amount of data retention available (see Table
15, page 27).
For a further more detailed review of lifetime calcu-
lations, please see Application Note AN1012.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M41ST85WMH6TR | RECTIFIER FAST-RECOVERY SINGLE 1A 400V 30A-ifsm 1.3V-vf 40ns 10uA-ir DO-41 1K/BULK |
| M41ST85WMH6 | RECTIFIER FAST-RECOVERY SINGLE 1A 300V 30A-ifsm 1.3V-vf 40ns 10uA-ir DO-41 5K/REEL-13 |
| M41ST87W | 5.0, 3.3, or 3.0V, 1280 bit (160 x8) Secure Serial RTC and NVRAM Supervisor with Tamper Detection |
| M41ST87WMX6 | RECTIFIER SCHOTTKY SINGLE 10A 25V 200A-Ifsm 0.45Vf 1A-IR D2PAK 50/TUBE |
| M41ST87WMX6TR | 5.0, 3.3, or 3.0V, 1280 bit (160 x8) Secure Serial RTC and NVRAM Supervisor with Tamper Detection |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M41ST85W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR |
| M41ST85W_06 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3V I2C Combination Serial RTC, NVRAM Supervisor and Microprocessor Supervisor |
| M41ST85W_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3V I2C combination serial RTC, NVRAM supervisor and microprocessor supervisor |
| M41ST85W_11 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3 V I2C combination serial RTC, NVRAM supervisor and microprocessor supervisor |
| M41ST85WMH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。