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參數(shù)資料
| 型號： | M41ST84WMQ6E |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 3.0/3.3V I2C Serial RTC with Supervisory Functions |
| 中文描述： | 3.0/3.3V I2C串行實時時鐘具有監(jiān)督職能 |
| 文件頁數(shù)： | 12/29頁 |
| 文件大小： | 176K |
| 代理商： | M41ST84WMQ6E |
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M41ST84W
12/29
WRITE Mode
In this mode the master transmitter transmits to
the M41ST84W slave receiver. Bus protocol is
shown in
Figure 12., page 12
. Following the
START condition and slave address, a logic '0' (R/
W=0) is placed on the bus and indicates to the ad-
dressed device that word address An will follow
and is to be written to the on-chip address pointer.
The data word to be written to the memory is
strobed in next and the internal address pointer is
incremented to the next memory location within
the RAM on the reception of an acknowledge
clock. The M41ST84W slave receiver will send an
acknowledge clock to the master transmitter after
it has received the slave address (see
Figure
9., page 10
) and again after it has received the
word address and each data byte.
Data Retention Mode
With valid V
CC
applied, the M41ST84W can be ac-
cessed as described above with READ or WRITE
cycles. Should the supply voltage decay, the
M41ST84W will automatically deselect, write pro-
tecting itself when V
CC
falls between V
PFD
(max)
and V
PFD
(min). This is accomplished by internally
inhibiting access to the clock registers. At this
time, the Reset pin (RST) is driven active and will
remain active until V
CC
returns to nominal levels.
When V
CC
falls below the Battery Back-up
Switchover Voltage (V
SO
), power input is switched
from the V
CC
pin to the external battery, and the
clock registers and SRAM are maintained from the
attached battery supply.
All outputs become high impedance. On power up,
when V
CC
returns to a nominal value, write protec-
tion continues for t
rec
. The RST signal also re-
mains active during this time (see
Figure
19., page 25
).
For a further more detailed review of lifetime calcu-
lations, please see Application Note AN1012.
Figure 12. WRITE Mode Sequence
AI00591
BUS ACTIVITY:
A
S
A
A
A
A
S
S
P
SDA LINE
BUS ACTIVITY:
MASTER
R
DATA n
DATA n+1
DATA n+X
WORD
ADDRESS (An)
SLAVE
ADDRESS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M41ST84W | 3.0/3.3V I2C Serial RTC with Supervisory Functions(帶監(jiān)視功能的3.0/3.3V I2C串行RTC) |
| M41ST84Y(中文) | 512 bit (64 x 8) Serial RTC with Supervisory Functions |
| M41ST84 | 5.0 OR 3.0V, 512 bit (64 x 8) Serial RTC with supervisory functions(具有監(jiān)控功能的5.0V或3.0V，512位(64 x 8)串行RTC) |
| M41ST85WMH6E | 3.0/3.3V I2C Combination Serial RTC, NVRAM Supervisor and Microprocessor Supervisor |
| M41ST85WMH6F | 3.0/3.3V I2C Combination Serial RTC, NVRAM Supervisor and Microprocessor Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M41ST84WMQ6F | 功能描述:實時時鐘 Serial 512 (64x8) RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M41ST84WMQ6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3V I2C Serial RTC with Supervisory Functions |
| M41ST84WSH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| M41ST84Y | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| M41ST84YMH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
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