參數(shù)資料
型號(hào): M41ST84WMQ6E
廠商: 意法半導(dǎo)體
英文描述: 3.0/3.3V I2C Serial RTC with Supervisory Functions
中文描述: 3.0/3.3V I2C串行實(shí)時(shí)時(shí)鐘具有監(jiān)督職能
文件頁數(shù): 10/29頁
文件大?。?/td> 176K
代理商: M41ST84WMQ6E
M41ST84W
10/29
READ Mode
In this mode the master reads the M41ST84W
slave after setting the slave address (see
Figure
9., page 10
). Following the WRITE Mode Control
Bit (R/W=0) and the Acknowledge Bit, the word
address ‘An’ is written to the on-chip address
pointer. Next the START condition and slave ad-
dress are repeated followed by the READ Mode
Control Bit (R/W=1). At this point the master trans-
mitter becomes the master receiver. The data byte
which was addressed will be transmitted and the
master receiver will send an Acknowledge Bit to
the slave transmitter. The address pointer is only
incremented on reception of an Acknowledge
Clock. The M41ST84W slave transmitter will now
place the data byte at address An+1 on the bus,
the master receiver reads and acknowledges the
new
byte
and
the
incremented to “An+2.”
address
pointer
is
This cycle of reading consecutive addresses will
continue until the master receiver sends a STOP
condition to the slave transmitter (see
Figure
10., page 11
).
The system-to-user transfer of clock data will be
halted whenever the address being read is a clock
address (00h to 07h). The update will resume ei-
ther due to a Stop Condition or when the pointer
increments to a non-clock or RAM address.
Note:
This is true both in READ Mode and WRITE
Mode.
An alternate READ Mode may also be implement-
ed whereby the master reads the M41ST84W
slave without first writing to the (volatile) address
pointer. The first address that is read is the last
one
stored
in
the
11., page 11
).
pointer
(see
Figure
Figure 9. Slave Address Location
AI00602
R/W
SLAVE ADDRESS
START
A
0
1
0
0
0
1
1
M
L
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M41ST84WMQ6TR 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3V I2C Serial RTC with Supervisory Functions
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