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參數(shù)資料
| 型號： | M40Z300MQ |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | NVRAM CONTROLLER for up to EIGHT LPSRAM |
| 中文描述： | NVRAM中多達(dá)8個LPSRAM控制器 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大小： | 128K |
| 代理商： | M40Z300MQ |
M40Z300, M40Z300W
8/16
Table 7. Power Down/Up AC Characteristics
(T
A
= 0 to 70°C)
Symbol
Note: 1. V
PFD
(max) to V
PFD
(min) fall time of less than tF may result in deselection/write protection not occurring until 200 μs after
V
CC
passes V
PFD
(min)..
2. V
PFD
(min) to V
SS
fall time of less than tFB may cause corruption of RAM data.
Parameter
Min
Max
Unit
t
F
(1)
V
PFD
(max) to V
PFD
(min) V
CC
Fall Time
300
μs
t
FB
(2)
V
PFD
(min) to V
SS
V
CC
Fall Time
150
μs
t
R
V
PFD
(min) to V
PFD
(max) V
CC
Rise Time
10
μs
t
EDL
Chip Enable Propagation Delay Low
M40Z300
12
ns
M40Z300W
20
ns
t
EDH
Chip Enable Propagation Delay High
M40Z300
10
ns
M40Z300W
20
ns
t
AS
A, B set up to E
0
ns
t
CER
Chip Enable Recovery
40
120
ms
t
REC
V
PFD
(max) to RST High
40
120
ms
t
WPT
Write Protect Time
M40Z300
40
150
μs
M40Z300W
40
250
μs
t
RB
V
SS
to V
PFD
(min) V
CC
Rise Time
1
μs
BATTERY LOW PIN
The M40Z300/W automatically performs battery
voltage monitoring upon power-up, and at factory-
programmed time intervals of at least 24 hours.
The Battery Low (BL) pin will be asserted if the
battery voltage is found to be less than approxi-
mately 2.5V. The BL pin will remain asserted until
completion of battery replacement and subse-
quent battery low monitoring tests, either during
the next power-up sequence or the next scheduled
24-hour interval.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below
2.5V and may not be able to maintain data integrity
in the SRAM. Data should be considered suspect,
and verified as correct. A fresh battery should be
installed.
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
promised due to the fact that a nominal V
CC
is
supplied. In order to insure data integrity during
subsequent periods of battery back-up mode, the
battery should be replaced. SNAPHAT top should
be replaced with valid V
CC
applied to the device.
The M40Z300/W only monitors the battery when a
nominal V
CC
is applied to the device. Thus appli-
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique. The BL pin is an open drain output and
an appropriate pull-up resistor to V
CC
should be
chosen to control the rise time.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M40Z300MQ1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:NVRAM CONTROLLER for up to EIGHT LPSRAM |
| M40Z300MQ1E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5 V or 3 V NVRAM supervisor for up to 8 LPSRAMs |
| M40Z300MQ1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V or 3V NVRAM supervisor for up to 8 LPSRAMs |
| M40Z300MQ1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:NVRAM CONTROLLER for up to EIGHT LPSRAM |
| M40Z300MQ6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V or 3V NVRAM supervisor for up to 8 LPSRAMs |
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