參數(shù)資料
型號(hào): M40Z300MQ
廠商: 意法半導(dǎo)體
英文描述: NVRAM CONTROLLER for up to EIGHT LPSRAM
中文描述: NVRAM中多達(dá)8個(gè)LPSRAM控制器
文件頁數(shù): 1/16頁
文件大?。?/td> 128K
代理商: M40Z300MQ
1/16
March 2000
M40Z300
M40Z300W
NVRAM CONTROLLER for up to EIGHT LPSRAM
I
CONVERT LOW POWER SRAMs into
NVRAMs
I
PRECISION POWER MONITORING and
POWER SWITCHING CIRCUITRY
I
AUTOMATIC WRITE-PROTECTION when V
CC
is OUT-OF-TOLERANCE
I
TWO INPUT DECODER ALLOWS CONTROL
for up to 8 SRAMs (with 2 devices active in
parallel)
I
CHOICE of SUPPLY VOLTAGES and
POWER-FAIL DESELECT VOLTAGES:
– M40Z300:
V
CC
= 4.5V to 5.5V
THS = V
SS
4.5V
V
PFD
4.75V
THS = V
OUT
4.2V
V
PFD
4.5V
– M40Z300W:
V
CC
= 3.0V to 3.6V
THS = V
SS
2.8V
V
PFD
3.0V
V
CC
= 2.7V to 3.3V
THS = V
OUT
2.5
V
PFD
2.7V
I
RESET OUTPUT (RST) for POWER ON
RESET
I
LESS THAN 12ns CHIP ENABLE ACCESS
PROPAGATION DELAY (for 5.0V device)
I
PACKAGING INCLUDES a 28-LEAD SOIC
and SNAPHAT
TOP, or a 16-LEAD SOIC
(to be Ordered Separately)
I
SOIC PACKAGE PROVIDES DIRECT
CONNECTION for a SNAPHAT TOP which
CONTAINS the BATTERY
I
BATTERY LOW PIN (BL)
DESCRIPTION
The M40Z300/W NVRAM Controller is a self-con-
tained device which converts a standard low-pow-
er SRAM into a non-volatile memory. A precision
voltage reference and comparator monitors the
V
CC
input for an out-of-tolerance condition.
Figure 1. Logic Diagram
AI02242
THS
VCC
M40Z300
M40Z300W
BL
VSS
E
VOUT
B
A
E1CON
E2CON
E3CON
E4CON
RST
B+
(1)
B–
(1)
NOTE: 1. For 16-pin SOIC package only.
28
1
SOH28 (MH)
SNAPHAT (SH)
Battery
16
1
SO16 (MQ)
相關(guān)PDF資料
PDF描述
M40Z300SH NVRAM CONTROLLER for up to EIGHT LPSRAM
M40Z300W NVRAM CONTROLLER for up to EIGHT LPSRAM
M40Z300WMH NVRAM CONTROLLER for up to EIGHT LPSRAM
M40Z300WMH1 NVRAM CONTROLLER for up to EIGHT LPSRAM
M40Z300WMH1TR NVRAM CONTROLLER for up to EIGHT LPSRAM
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