參數(shù)資料
型號(hào)： M38C29FFFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, PLASTIC, LQFP-64
文件頁數(shù)： 16/101頁
文件大?。?/td> 1529K
代理商： M38C29FFFP
21
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Key Input Interrupt (Key-on Wake-Up)
A key input interrupt request is generated by detecting the falling
edge from any pin of ports P00–P03, P54–P57 that have been set to
input mode. In other words, it is generated when AND of input level
goes from “1” to “0”. An example of using a key input interrupt is
shown in Figure 17, where an interrupt request is generated by press-
ing one of the keys consisted as an active-low key matrix which in-
puts to ports P54–P57.
Fig. 17 Connection example when using key input interrupt and ports P0 and P5 block diagram
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Key input control
register = “1”
Port P54
latch
Port P54
direction register = “0”
Port P55
latch
Port P55
direction register = “0”
Port P56
latch
Port P56
direction register = “0”
Port P57
latch
Port P57
direction register = “0”
Port P00
latch
Port P00
direction register = “1”
Port P01
latch
Port P01
direction register = “1”
Port P02
latch
Port P02
direction register = “1”
Port P03
latch
Port P03
direction register = “1”
P54 input
P55 input
P56 input
P57 input
P00 output
P01 output
P02 output
P03 output
PULL register
Bit 5 = “1”
Port P0
Input reading circuit
Port PXx
“L” level output
Key input interrupt request
Port P5
Input reading circuit
Key input control
register = “1”
Segment output
disable register 0
Bit 3 = “1”
Segment output
disable register 0
Bit 2 = “1”
Segment output
disable register 0
Bit 1 = “1”
Segment output
disable register 0
Bit 0 = “1”
P-channel transistor for pull-up
CMOS output buffer
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參數(shù)描述
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