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| 型號(hào)： | M38B79MFH-A055 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 14/109頁(yè) |
| 文件大?。?/td> | 1559K |
| 代理商： | M38B79MFH-A055 |
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38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
14
I/O PORTS
[Direction Registers] PiD
The 38B7 group has 75 programmable I/O pins arranged in ten in-
dividual I/O ports (P1, P3, P4, P5, P6, P7, P8, P9, PA and PB).
The I/O ports have direction registers which determine the input/
output direction of each individual pin. Each bit in a direction reg-
port or output port. When
“
0
”
is written to the bit corresponding to
a pin, that pin becomes an input pin. When
“
1
”
is written to that
pin, that pin becomes an output pin. If data is read from a pin set
to output, the value of the port output latch is read, not the value of
the pin itself. Pins set to input (the bit corresponding to that pin
must be set to
“
0
”
) are floating and the value of that pin can be
read. If a pin set to input is written to, only the port output latch is
written to and the pin remains floating.
Fig. 10 Structure of pull-up control registers
(PULL1, PULL2 and PULL3)
[High-Breakdown-Voltage Output Ports]
The 38B7 group has seven ports with high-breakdown-voltage
pins (ports P0 to P5 and P6
0
–
P6
3
). The high-breakdown-voltage
ports have P-channel open-drain output with Vcc
–
45 V of break-
down voltage. Each pin in ports P0 to P3 has an internal pull-down
resistor connected to V
EE
. At reset, the P-channel output transis-
tor of each port latch is turned off, so that it goes to V
EE
level (
“
L
”
)
by the pull-down resistor.
Writing
“
1
”
(weak drivability) to bit 7 of the FLDC mode register
(address 0EF4
16
) shows the rising transition of the output transis-
tors for reducing transient noise. At reset, bit 7 of the FLDC mode
register is set to
“
0
”
(strong drivability).
[Pull-up Control Register] PULL
Ports P6
4
–
P6
7
, P7, P8
0
–
P8
3
, P9, PA and PB have built-in pro-
grammable pull-up resistors. The pull-up resistors are valid only in
the case that the each control bit is set to
“
1
”
and the correspond-
ing port direction registers are set to input mode.
0: No pull-up
1: Pull-up
Pull-up control register 3
(PULL3 : address 0EEF
16
)
PA
0
, PA
1
pull-up control bit
PA
2
, PA
3
pull-up control bit
PA
4
, PA
5
pull-up control bit
PA
6
, PA
7
pull-up control bit
PB
0
, PB
1
pull-up control bit
PB
2
, PB
3
pull-up control bit
PB
4
, PB
5
pull-up control bit
PB
6
pull-up control bit
b7
b0
0: No pull-up
1: Pull-up
Pull-up control register 1
(PULL1 : address 0EF0
16
)
P6
4
, P6
5
pull-up control bit
P6
6
, P6
7
pull-up control bit
P7
0
, P7
1
pull-up control bit
P7
2
, P7
3
pull-up control bit
P7
4
, P7
5
pull-up control bit
P7
6
, P7
7
pull-up control bit
Not used (returns
“
0
”
when read)
(Do not write
“
1
”
.)
b7
b0
Pull-up control register 2
(PULL2 : address 0EF1
16
)
P8
0
, P8
1
pull-up control bit
P8
2
, P8
3
pull-up control bit
Not used (returns
“
0
”
when read)
(Do not write
“
1
”
.)
P9
0
, P9
1
pull-up control bit
P9
2
, P9
3
pull-up control bit
P9
4
, P9
5
pull-up control bit
P9
6
, P9
7
pull-up control bit
Not used (returns
“
0
”
when read)
(Do not write
“
1
”
.)
b7
b0
0: No pull-up
1: Pull-up
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