參數(shù)資料
型號: M38B59MFH-E107FP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁數(shù): 23/69頁
文件大小: 1011K
代理商: M38B59MFH-E107FP
MITSUBISHI MICROCOMPUTERS
38B5 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
23
PRELIMINARY
Notice: This s not a final specification.
Some parametric imits are subject to change.
Fig. 18 Structure of Timer X Related Registers
b7
b0
Timer X mode register 1
(TXM1 : address 002E
16
)
Timer X write control bit
0 : Write data to both timer latch and timer
1 : Write data to timer latch only
Timer X count source selection bits
b2 b1
0 0 : f(X
IN
)/2 or f(X
CIN
)/4
0 1 : f(X
IN
)/8 or f(X
CIN
)/16
1 0 : f(X
IN
)/64 or f(X
CIN
)/128
1 1 : Not available
Not used (returns "0" when read)
Timer X operating mode bits
b5 b4
0 0 : Timer mode
0 1 : Pulse output mode
1 0 : Event counter mode
1 1 : Pulse width measurement mode
CNTR
2
active edge switch bit
0 : Event counter mode ; counts rising edges
Pulse output mode ; output starts with “H” level
Pulse width measurement mode ; measures “H” periods
1 : Event counter mode ; counts falling edges
Pulse output mode ; output starts with “L” level
Pulse width measurement mode ; measures “L” periods
Timer X stop control bit
0 : Count operating
1 : Count stop
Real time port control bit (P8
5
)
0 : Real time port function is invalid
1 : Real time port function is valid
Real time port control bit (P8
6
)
0 : Real time port function is invalid
1 : Real time port function is valid
P8
5
data for real time port
P8
6
data for real time port
Not used (returns "0" when read)
Timer X mode register 2
(TXM2 : address 002F
16
)
b7
b0
Fig. 17 Block Diagram of Timer X
CNTR
2
active
edge switch bit
CNTR
2
active
edge switch bit
Real time port
control bit
Real time port
control bit
S
“0”
“1”
“0”
“1”
“10”
“00”,“01”,“11”
Q
Q
T
P6
1
/CNTR
0
/CNTR
2
CNTR
0
“1”
“0”
“1”
“0”
“1”
“0”
Q D
Q D
P8
5
P8
6
“1”
“0”
X
IN
X
CIN
“1”
“0”
1/2
1/2
1/8
1/64
P6
1
latch
Timer X (low-order) (8)
Timer X (high-order) (8)
Timer X latch (high-order) (8)
Timer X latch (low-order) (8)
Data bus
Pulse output mode
P6
1
direction
register
Pulse width
measurement mode
Timer X operating
mode bit
Timer X stop
control bit
Pulse output mode
Count source selection bit
Internal system clock
selection bit
D
Timer X write
control bit
Timer X
interrupt request
Timer X mode register
write signal
P8
6
latch
P8
6
direction
register
P8
5
latch
P8
5
direction
register
Latch
Latch
P8
5
data for real time port
Real time port
control bit (P8
5
)
P8
6
data for real time port
Real time port
control bit (P8
6
)
Timer X mode register
write signal
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