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參數(shù)資料
| 型號： | M38858MC-XXXHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 88/105頁 |
| 文件大?。?/td> | 1403K |
| 代理商： | M38858MC-XXXHP |
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3885 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
80
CPU Reprogram Mode
In CPU reprogram mode, the on-chip flash memory can be operated
on (read, program, or erase) under control of the Central Processing
Unit (CPU).
In CPU reprogram mode, only the user ROM area shown in Figure
72 can be reprogrammed; the Boot ROM area cannot be repro-
grammed. Make sure the program and block erase commands are
issued for only the user ROM area.
The control program for CPU reprogram mode can be stored in ei-
ther user ROM or Boot ROM area. In the CPU reprogram mode,
because the flash memory cannot be read from the CPU, the repro-
gram control software must be transferred to internal RAM area be-
fore it can be executed.
Microcomputer Mode and Boot Mode
The control software for CPU reprogram mode must be programed
into the user ROM or Boot ROM area in parallel I/O mode before-
hand. (If the control software is programed into the Boot ROM area,
the standard serial I/O mode becomes unusable.)
See Figure 72 for details about the Boot ROM area.
Normal microcomputer mode is entered when the microcomputer is
released from reset with pulling CNVSS pin low. In this case, the
CPU starts operating using the control software in the user ROM
area.
When the microcomputer is released from reset by pulling the P46/
SCLK pin high, the CNVSS pin high, the CPU starts operating using
the control software in the Boot ROM area (program start address
should be stored FFFC16, FFFD16). This mode is called the “boot
mode”.
Block Address
Block addresses refer to the maximum address of each block. These
addresses are used in the block erase command. In case of the
M38859FF, these are two block.
Outline Performance (CPU Reprogram Mode)
In the CPU reprogram mode, the CPU erases, programs and reads
the internal flash memory as instructed by software commands. This
reprogram control software must be transferred to internal RAM be-
fore it can be executed.
The CPU reprogram mode is accessed by applying 5V ± 10% to the
CNVSS pin and writing “1” for the CPU reprogram mode select bit (bit
1 in address 0FFE16). Software commands are accepted once the
mode is accessed.
Use software commands to control software and erase operations.
Whether a program or erase operation has terminated normally or in
error can be verified by reading the status register.
Figure 77 shows the flash memory control register.
_____
Bit 0 is the RY/BY status flag used exclusively to read the operating
status of the flash memory. During programming and erase opera-
tions, it is “0”. Otherwise, it is “1”.
Bit 1 is the CPU reprogram mode select bit. When this bit is set to “1”
and 5V ± 10% are applied to the CNVSS pin, the M38859FF enters
the CPU reprogram mode. Software commands are accepted once
the mode is accessed. In CPU reprogram mode, the CPU becomes
unable to access the internal flash memory. Therefore, use the con-
trol software in RAM for write to bit 1. To set this bit to “1”, it is neces-
sary to write “0” and then write “1” in succession. The bit can be set
to “0” by only writing a “0”.
Bit 2 is the CPU reprogram mode entry flag. This bit can be read to
check whether the CPU reprogram mode has been entered or not.
Bit 3 is the flash memory reset bit used to reset the control circuit of
the internal flash memory. This bit is used when exiting CPU repro-
gram mode and when flash memory access has failed. When the
CPU reprogram mode select bit is “1”, writing “1” for this bit resets
the control circuit. To release the reset, it is necessary to set this bit
to “0”.
Bit 4 is the User area/Boot area selection bit. When this bit is set to
“1”, Boot ROM area is accessed, and CPU reprogram mode in Boot
ROM area is available. In boot mode, this bit is set “1” automatically.
To set and clear this bit must be operated in RAM area.
Figure 78 shows a flowchart for setting/releasing the CPU repro-
gram mode.
Notes on CPU Reprogram Mode
Described below are the precautions to be observed when repro-
gram the flash memory in CPU reprogram mode.
(1) Operation speed
During CPU reprogram mode, set the internal clock
φ frequency
4MHz or less using the main clock division ratio selection bits (bit
6,7 at 003B16).
(2) Instructions inhibited against use
The instructions which refer to the internal data of the flash
memory cannot be used during CPU reprogram mode .
(3) Interrupts inhibited against use
The interrupts cannot be used during CPU reprogram mode be-
cause they refer to the internal data of the flash memory.
(4) Watchdog timer
In case of the watchdog timer has been running already, the in-
ternal reset generated by watchdog timer underflow does not
happen, because of watchdog timer is always clearing during
program or erase operation.
(5) Reset
Reset is always valid. In case of CNVSS = “H” when reset is re-
leased, boot mode is active. So the program starts from the ad-
dress contained in address FFFC16 and FFFD16 in boot ROM
area.
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| M38869MFA-XXXGP | 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP80 |
| M38869MCA-XXXGP | 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP80 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38858MD-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38858ME-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38858MF-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38859F1-HP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38859F2-HP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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