31
3885 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
SERIAL I/O
Serial I/O
Serial I/O works as either clock synchronous serial I/O mode or
universal asynchronous receiver transmitter (UART) serial I/O
mode. A dedicated timer is also provided for baud rate generation.
(1) Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode can be selected by setting the
serial I/O mode selection bit of the serial I/O control register (bit 6
of SIOCON) to “1”.
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. When an internal clock is used, the
transfer starts by writing to the TB.
Fig. 26 Block diagram of clock synchronous serial I/O
Fig. 27 Operation of clock synchronous serial I/O function
1/4
F/F
P46/SCLK
Serial I/O status register
Serial I/O control register
P47/SRDY/CLKRUN
P44/RXD
P45/TXD
f(XIN)
Receive buffer register
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Clock control circuit
Shift clock
Serial I/O synchronous
clock selection bit
Baud rate generator
BRG count source selection bit
Clock control circuit
Falling-edge detector
Transmit buffer register
Data bus
Shift clock
Transmit shift completion flag (TSC)
Transmit buffer empty flag (TBE)
Transmit interrupt request (TI)
Transmit interrupt source selection bit
Data bus
Transmit shift register
(f(XCIN) in low-speed
mode)
Frequency division ratio 1/(n+1)
Address 001816
Address 001A16
Address 001C16
Address 001816
D7
D0
D1
D2
D3
D4
D5
D6
D0
D1
D2
D3
D4
D5
D6
RBF = 1
TSC = 1
TBE = 0
TSC = 1
TBE = 1
TSC = 0
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
TxD pin
RxD pin
Write pulse to transmit buffer
register (TB)
Overrun error (OE)
detection
Notes 1: As the transmit interrupt (TI), which can be selected, either when the transmit buffer has emptied (TBE=1) or after the
transmit shift operation has ended (TSC=1), by setting the transmit interrupt source selection bit (TIC) of the serial I/O
control register.
2: If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and the next
serial data is output continuously from the TxD pin.
3: The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1” .
SRDY pin