參數(shù)資料
型號(hào): M38503G4A-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDSO42
封裝: 8.40 X 17.5 MM, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁(yè)數(shù): 58/59頁(yè)
文件大?。?/td> 885K
代理商: M38503G4A-XXXFP
Rev.2.13
Apr 17, 2009
Page 8 of 56
REJ03B0125-0213
3850 Group (Spec.A QzROM version)
Fig 6.
Register push and pop at interrupt generation and subroutine call
Interrupt request
(Note)
M(S)
←(PCH)
(S)
←(S) 1
M(S)
←(PCL)
(
S)
(S) 1
....
.
Execute RTS
Subroutine
(S)
←(S) + 1
(PCL)
←M(S)
(S)
←(S) + 1
(PCH)
←M(S)
M(S)
←(PCH)
(S)
←(S) 1
M(S)
←(PCL)
(S)
←(S) 1
M(S)
←(PS)
(S)
←(S) 1
Interrupt
Service Routine
(S)
←(S) + 1
(PS)
←M(S)
(S)
←(S) + 1
(PCL)
←M(S)
(S)
←(S) + 1
(PCH)
←M(S)
Execute JSR
....
.
Execute RTI
Push return address
on stack
Push contents of processor
status register on stack
I Flag is set from “0” to “1”
Fetch the jump vector
POP contents of processor
status register from stack
POP return
address from stack
POP return
address from
stack
Push return
address
on stack
Note : Condition for acceptance of an interrupt
→ Interrupt enable flag is “1”
Interrupt disable flag is “0”
On-going Routine
Table 5
Push and pop instructions of accumulator or processor status register
Push instruction to stack
Pop instruction from stack
Accumulator
PHA
PLA
Processor status register
PHP
PLP
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