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參數(shù)資料
| 型號： | M38503E4SS |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 43/86頁 |
| 文件大小： | 1193K |
| 代理商： | M38503E4SS |
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43
3850 Group (Spec. H)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 47 Program flowchart
Program Command (40
16
)
Program operation starts when the command code
“
40
16
”
is written
in the first bus cycle. Then, if the address and data to program are
written in the 2nd bus cycle, program operation (data programming
and verification) will start.
Whether the write operation is completed can be confirmed by read-
ing the status register or the RY/BY status flag. When the program
starts, the read status register mode is accessed automatically and
the content of the status register is read into the data bus (D0
–
D7).
The status register bit 7 (SR7) is set to
“
0
”
at the same time the write
operation starts and is returned to
“
1
”
upon completion of the write
operation. In this case, the read status register mode remains active
until the read array command (FF
16
) is written.
The RY/BY status flag is
“
0
”
during write operation and
“
1
”
when the
write operation is completed as is the status register bit 7.
At program end, program results can be checked by reading the sta-
tus register.
Erase All Blocks Command (20
16
/20
16
)
By writing the command code
“
20
16
”
in the first bus cycle and the
confirmation command code
“
20
16
”
in the second bus cycle that fol-
lows, the system starts erase all blocks( erase and erase verify).
Whether the erase all blocks command is terminated can be con-
firmed by reading the status register or the RY/BY status flag. When
the erase all blocks operation starts, the read status register mode is
accessed automatically and the content of the status register can be
read out. The status register bit 7 (SR7) is set to
“
0
”
at the same time
the erase operation starts and is returned to
“
1
”
upon completion of
the erase operation. In this case, the read status register mode re-
mains active until the read array command (FF
16
) is written.
The RY/BY status flag is
“
0
”
during erase operation and
“
1
”
when the
erase operation is completed as is the status register bit 7.
At erase all blocks end, erase results can be checked by reading the
status register. For details, refer to the section where the status reg-
ister is detailed.
Block Erase Command (20
16
/D0
16
)
By writing the command code
“
20
16
”
in the first bus cycle and the
confirmation command code
“
D0
16
”
in the second bus cycle that
follows to the block address of a flash memory block, the system
initiates a block erase (erase and erase verify) operation.
Whether the block erase operation is completed can be confirmed
by reading the status register or the RY/BY status flag. At the same
time the block erase operation starts, the read status register mode
is automatically entered, so the content of the status register can be
read out. The status register bit 7 (SR7) is set to
“
0
”
at the same time
the block erase operation starts and is returned to
“
1
”
upon comple-
tion of the block erase operation. In this case, the read status regis-
ter mode remains active until the read array command (FF
16
) is writ-
ten.
The RY/BY status flag is
“
0
”
during block erase operation and
“
1
”
when the block erase operation is completed as is the status register
bit 7.
After the block erase operation is completed, the status register can
be read out to know the result of the block erase operation. For de-
tails, refer to the section where the status register is detailed.
Fig. 48 Erase flowchart
Start
Write
40
16
Status register
read
Program
completed
NO
YES
Write address
Write data
SR4=0
Program
error
NO
YES
SR7=1
or
RY/BY=1
Write
Write 20
16
20
16
/D0
16
Block address
Erase completed
NO
YES
Start
Write
SR5=0
Erase error
YES
NO
20
16
:Erase all blocks
D0
16
:Block erase
SR7=1
or
RY/BY=1
Status register
read
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