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參數(shù)資料
| 型號： | M381L1713FTM-CA2 |
| 元件分類： | DRAM |
| 英文描述： | 16M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封裝： | DIMM-184 |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 273K |
| 代理商： | M381L1713FTM-CA2 |
DDR SDRAM
128MB, 256MB Unbuffered DIMM
Rev. 1.0 March. 2004
Note : 1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the same.
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
simulation. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
Output Load Circuit (SSTL_2)
Output
Z0=50
CLOAD=30pF
VREF
=0.5*VDDQ
RT=50
Vtt=0.5*VDDQ
Input/Output Capacitance
(VDD=2.5V, VDDQ=2.5V, TA= 25
°C, f=1MHz)
Parameter
Symbol
M381L1713FTM
Unit
Min
Max
Input capacitance(A0 ~ A11, BA0 ~ BA1,RAS,CAS,WE )
CIN1
51
60
pF
Input capacitance(CKE0)
CIN2
44
53
pF
Input capacitance( CS0)
CIN3
44
53
pF
Input capacitance( CLK0, CLK1,CLK2)
CIN4
25
30
pF
Input capacitance(DM0~DM7, DM8(fpr ECC))
CIN5
6
7
pF
Data & DQS input/output capacitance(DQ0~DQ63)
Cout1
6
7
pF
Data input/output capacitance (CB0~CB7)
Cout2
6
7
pF
AC Operating Conditions
Parameter/Condition
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
VIH(AC)
VREF + 0.31
V
3
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
VIL(AC)
VREF - 0.31
V
3
Input Differential Voltage, CK and CK inputs
VID(AC)
0.7
VDDQ+0.6
V
1
Input Crossing Point Voltage, CK and CK inputs
VIX(AC)
0.5*VDDQ-0.2
0.5*VDDQ+0.2
V
2
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