參數(shù)資料
型號: M38039FFSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-64
文件頁數(shù): 90/117頁
文件大?。?/td> 1873K
代理商: M38039FFSP
Rev.3.11
Apr 5, 2006
Page 74 of 113
REJ03B0017-0311
3803 Group (Spec.H)
Block Erase Command (2016/D016)
By writing the command code “2016” in the first bus cycle and
the confirmation command code “D016” and the block address in
the second bus cycle that follows, the block erase (erase and
erase verify) operation starts for the block address of the flash
memory to be specified.
Whether the block erase operation is completed can be confirmed
by read status register or the RY/BY status flag of flash memory
control register. At the same time the block erase operation starts,
the read status register mode is automatically entered, so that the
contents of the status register can be read out. The status register
bit 7 (SR7) is set to “0” at the same time the block erase
operation starts and is returned to “1” upon completion of the
block erase operation. In this case, the read status register mode
remains active until the read array command (FF16) is written.
The RY/BY status flag is “0” during block erase operation and
“1” when the block erase operation is completed as is the status
register bit 7.
After the block erase ends, erase results can be checked by
reading the status register. For details, refer to the section where
the status register is detailed.
Fig 70. Erase flowchart
Write “2016
Write “D016
Blockaddress
Read status register
SR7 =
1?
or
RY/BY =
1?
Erase completed
(write read command
“FF16”)
NO
YES
Start
SR5 = “0”?
Erase error
YES
NO
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