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參數(shù)資料
| 型號： | M38039FFSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | 0.750 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-64 |
| 文件頁數(shù)： | 10/117頁 |
| 文件大?。?/td> | 1873K |
| 代理商： | M38039FFSP |
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Rev.3.11
Apr 5, 2006
Page 107 of 113
REJ03B0017-0311
3803 Group (Spec.H)
NOTES ON PERIPHERAL FUNCTIONS
Notes on Input and Output Ports
1. Notes in standby state
In standby state*1 for low-power dissipation, do not make input
levels of an I/O port “undefined”. Even when an I/O port of
Nchannel open-drain is set as output mode, if output data is “1”,
the aforementioned notes are necessary.
Pull-up (connect the port to VCC) or pull-down (connect the port
to VSS) these ports through a resistor.
When determining a resistance value, note the following points:
External circuit
Variation of output levels during the ordinary operation
When using built-in pull-up resistor, note on varied current
values:
When setting as an input port : Fix its input level
When setting as an output port : Prevent current from flowing
out to external
<Reason>
Exclusive input ports are always in a high-impedance state. An
output transistor becomes an OFF state when an I/O port is set as
input mode by the direction register, so that the port enter a
highimpedance state. At this time, the potential which is input to
the input buffer in a microcomputer is unstable in the state that
input levels are “undefined”. This may cause power source
current.
Even when an I/O port of N-channel open-drain is set as output
mode by the direction register, if the contents of the port latch is
“1”, the same phenomenon as that of an input port will occur.
*1 Standby state :
stop mode by executing STP instruction
wait mode by executing WIT instruction
2. Modifying output data with bit managing instruction
When the port latch of an I/O port is modified with the bit
managing instruction*2, the value of the unspecified bit may be
changed.
<Reason>
The bit managing instructions are read-modify-write form
instructions for reading and writing data by a byte unit.
Accordingly, when these instructions are executed on a bit of the
port latch of an I/O port, the following is executed to all bits of
the port latch.
As for bit which is set for input port:
The pin state is read in the CPU, and is written to this bit after
bit managing.
As for bit which is set for output port:
The bit value is read in the CPU, and is written to this bit after
bit managing.
Note the following:
Even when a port which is set as an output port is changed for
an input port, its port latch holds the output data.
As for a bit of which is set for an input port, its value may be
changed even when not specified with a bit managing
instruction in case where the pin state differs from its port latch
contents.
*2 Bit managing instructions : SEB, and CLB instructions
Termination of Unused Pins
1. Terminate unused pins
(1) Output ports : Open
(2) I/O ports :
Set the I/O ports for the input mode and connect them to VCC
or VSS through each resistor of 1 k
to 10 k.
Ports that permit the selecting of a built-in pull-up resistor can
also use this resistor. Set the I/O ports for the output mode and
open them at “L” or “H”.
When opening them in the output mode, the input mode of the
initial status remains until the mode of the ports is switched
over to the output mode by the program after reset. Thus, the
potential at these pins is undefined and the power source
current may increase in the input mode. With regard to an
effects on the system, thoroughly perform system evaluation
on the user side.
Since the direction register setup may be changed because of a
program runaway or noise, set direction registers by program
periodically to increase the reliability of program.
(3) The AVSS pin when not using the A/D converter :
When not using the A/D converter, handle a power source pin
for the A/D converter, AVSS pin as follows:
AVSS: Connect to the VSS pin.
2. Termination remarks
(1) I/O ports :
Do not open in the input mode.
<Reason>
The power source current may increase depending on the
firststage circuit.
An effect due to noise may be easily produced as compared
with proper termination (2) in 1 and shown on the above.
(2) I/O ports :
When setting for the input mode, do not connect to VCC or VSS
directly.
<Reason>
If the direction register setup changes for the output mode
because of a program runaway or noise, a short circuit may occur
between a port and VCC (or VSS).
(3) I/O ports :
When setting for the input mode, do not connect multiple ports in
a lump to VCC or VSS through a resistor.
<Reason>
If the direction register setup changes for the output mode
because of a program runaway or noise, a short circuit may occur
between ports.
At the termination of unused pins, perform wiring at the
shortest possible distance (20 mm or less) from micro-
computer pins.
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