參數(shù)資料
型號: M38039FFSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-64
文件頁數(shù): 57/117頁
文件大?。?/td> 1873K
代理商: M38039FFSP
Rev.3.11
Apr 5, 2006
Page 44 of 113
REJ03B0017-0311
3803 Group (Spec.H)
[Transmit Buffer Register 1/Receive Buffer Register 1
(TB1/RB1)] 001816
The transmit buffer register 1 and the receive buffer register 1 are
located at the same address. The transmit buffer is write-only and
the receive buffer is read-only. If a character bit length is 7 bits,
the MSB of data stored in the receive buffer is “0”.
[Serial I/O1 Status Register (SIO1STS)] 001916
The read-only serial I/O1 status register consists of seven flags
(bits 0 to 6) which indicate the operating status of the serial I/O1
function and various errors.
Three of the flags (bits 4 to 6) are valid only in UART mode.
The receive buffer full flag (bit 1) is cleared to “0” when the
receive buffer register is read.
If there is an error, it is detected at the same time that data is
transferred from the receive shift register to the receive buffer
register, and the receive buffer full flag is set. A write to the
serial I/O1 status register clears all the error flags OE, PE, FE,
and SE (bit 3 to bit 6, respectively). Writing “0” to the serial I/O1
enable bit SIOE (bit 7 of the serial I/O1 control register) also
clears all the status flags, including the error flags.
Bits 0 to 6 of the serial I/O1 status register are initialized to “0” at
reset, but if the transmit enable bit (bit 4) of the serial I/O1
control register has been set to “1”, the transmit shift completion
flag (bit 2) and the transmit buffer empty flag (bit 0) become “1”.
[Serial I/O1 Control Register (SIO1CON)] 001A16
The serial I/O1 control register consists of eight control bits for
the serial I/O1 function.
[UART1 Control Register (UART1CON)] 001B16
The UART control register consists of four control bits (bits 0 to
3) which are valid when asynchronous serial I/O is selected and
set the data format of an data transfer, and one bit (bit 4) which is
always valid and sets the output structure of the P45/TXD1 pin.
[Baud Rate Generator 1 (BRG1)] 001C16
The baud rate generator determines the baud rate for serial
transfer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate
generator.
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