參數(shù)資料
型號(hào)： M37902FCCHP
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 26 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù)： 29/143頁(yè)
文件大?。?/td> 1148K
代理商： M37902FCCHP
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M37902FCCHP, M37902FGCHP, M37902FJCHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
124
ns
Bus cycle = 2
φ + 2φ
Bus cycle = 3
φ + 3φ, 3φ + 4φ
td(
φ1-RDL)
td(
φ1-RDH)
td(
φ1-BXWL)
td(
φ1-BXWH)
td(
φ1L-CSiL)
td(
φ1L-CSiH)
td(
φ1H-A)
td(
φ1L-A)
tw(ALEH)
td(A-ALEL)
tw(RDL)
tw(RDH)
td(RDH-BXWH)
td(A-RDH)
th(RDH-A)
td(RDH-ALEL)
td(ALEL-RDH)
td(CSiL-RDH)
td(CSiL-RDL)
th(RDH-CSiL)
td(RDH-D)
tw(BXWL)
tw(BXWH)
td(BXWH-RDH)
td(A-BXWH)
th(BXWH-A)
td(BXWH-ALEL)
td(ALEL-BXWH)
td(CSiL-BXWH)
td(CSiL-BXWL)
th(BXWH-CSiL)
td(D-BXWL)
th(BXWH-D)
tpxz(BXWH-DZ)
Parameter
Switching characteristics (VCC = 5 V±0.5 V, VSS = 0 V, Ta = –20 to 85 °C, f(fsys) = 26 MHz, unless otherwise noted)
Max.
0
10
25
16
20
0.5tc + 10
Min.
–18
–20
–22
–5
–20
0.5tc-19
tc-20
1.5tc-20
tc-30
1.5tc-30
2tc-30
0.5tc-19
tc-20
1.5tc-20
WL tc-15
WH tc-15
tc-15
WH tc-30
(WH-0.5)tc-19
8
0.5tc-10
0.5tc-19
tc-15
(WH-0.5)tc-19
(WH + WL-0.5)tc-20
0.5tc-14
tc-15
WL tc-15
WH tc-15
tc-15
WH tc-30
(WH-0.5)tc-19
8
0.5tc-10
0.5tc-19
tc-15
(WH-0.5)tc-19
(WH + WL-0.5)tc-20
0.5tc-14
WL tc-20
0.5tc-10
Read low-level output delay time
Read high-level output delay time
Write low-level output delay time
Write high-level output delay time
Chip select low-level output delay time
Chip select high-level output delay time
Address output delay time (the address output select bit = 0)
Address output delay time (the address output select bit = 1)
ALE pulse width
ALE completion delay time
after address stabilization
(when the address output
select bit = 0)
ALE completion delay time
after address stabilization
(when the address output
select bit = 1)
Read output pulse width
Read output high-level width (Note 1)
Write disable valid time after read (Note 2)
Address valid time before read (when the address output select bit = 0)
Address valid time before read (when the address output select bit = 1)
Address hold time after read (when the address output select bit = 0) (Note 2)
Address hold time after read (when the address output select bit = 1) (Note 2)
ALE completion delay time after read start
Read disable valid time
after ALE completion
Chip select valid time before read
Chip select output valid time before read completion
Chip select hold time after read
Next write cycle data output delay time after read (Note 2)
Write output pulse width
Write output high-level width (Note 1)
Read disable valid time after write (Note 2)
Address valid time before write (when the address output select bit = 0)
Address valid time before write (when the address output select bit = 1)
Address hold time after write (when the address output select bit = 0) (Note 2)
Address hold time after write (when the address output select bit = 1) (Note 2)
ALE completion delay time after write start
Write disable valid time
after ALE completion
Chip select valid time before write
Chip select output valid time before write completion
Chip select hold time after write
Data output valid time before write completion
Data hold time after write (Note 3)
Floating start delay time after write (Note 3)
Limits
Symbol
Unit
Bus cycle = 1
φ + 1φ, 1φ + 2φ, 1φ + 3φ
Bus cycle = 2
φ + 2φ
Bus cycle = 2
φ + 3φ, 2φ + 4φ, 3φ + 3φ, 3φ + 4φ
Bus cycle = 1
φ + 1φ, 1φ + 2φ, 1φ + 3φ
Bus cycle = 2
φ + 2φ
Bus cycle = 2
φ + 3φ, 2φ + 4φ, 3φ + 3φ, 3φ + 4φ
Bus cycle = 2
φ + 2φ
Bus cycle = 2
φ + 3φ, 2φ + 4φ, 3φ + 3φ, 3φ + 4φ
Notes 1: When the bus cycle just before this parameter is for the area where the recovery cycle insertion is selected, this parameter is extended by tc (ns: one recovery cycle is inserted.) or by 2tc (ns: two recovery cycles are inserted.).
2: When accessing the area where the recovery cycle insertion is selected, this parameter is extended by tc (ns: one recovery cycle is inserted.) or by 2tc (ns: two recovery cycles are inserted.).
3: This parameter is extended by tc (ns) when both of the following conditions are satisfied:
When accessing the area where the recovery cycle insertion is selected.
When two recovery cycles are inserted.
Bus cycle = 1
φ + 1φ, 1φ + 2φ, 1φ + 3φ
Bus cycle = 2
φ + 2φ
Bus cycle = 2
φ + 3φ, 2φ + 4φ, 3φ + 3φ, 3φ + 4φ
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M37902FGCGP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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