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33
MITSUBISHI MICROCOMPUTERS
M37754FFCGP
M37754FFCHP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
CPU reprogramming mode operation proce-
dure
The operation procedure in CPU reprogramming mode is described
below.
< Beginning procedure >
Apply 0 V to the CNVss/VPP pin for reset release.
Set the processor mode register 0 (see Figure 23).
After CPU reprogramming mode control program is transferred to
internal RAM, jump to this control program on RAM. (The follow-
ing operations are controlled by this control program).
Set “1" (8-bit length) to data length select flag m.
Set “1" to the CPU reprogramming mode select bit.
Apply VPPH to the CNVSS/VPP pin.
Read the CPU reprogramming mode monitor flag to confirm
whether the CPU reprogramming mode is valid.
The operation of the flash memory is executed by software-com-
mand-writing to the flash command register .
Note: The following are necessary other than this:
Control for data which is input from the external (serial I/O
etc.) and to be programmed to the flash memory
Initial setting for ports etc.
Writing to the watchdog timer
< Release procedure >
Apply 0V to the CNVSS/VPP pin.
Set the CPU reprogramming mode select bit to “0.”
Each software command is explained as follows.
Read command
When “0016" is wr itten to the flash command register,
the
M37754FFCGP and the M37754FFCHP enter the read mode. The
contents of the corresponding address can be read by reading the
flash memory (For instance, with the LDA instruction etc.) under this
condition.
The read mode is maintained until another command code is written
to the flash command register. Accordingly, after setting the read
mode once, the contents of the flash memory can continuously be
read.
After reset and after the reset command is executed, the read mode
is set.
Fig. 22 Flash command register bit configuration
Writing of software command
<Command code>
“0016”
“4016”
“C016”
“2016” + “2016”
“A016”
“3016” + “3016”
“FF16” + “FF16”
<Software command name>
Read command
Program command
Program verify command
Erase command
Erase verify command
Auto erase command
Reset command
Note: The flash command register is write-only register.
Flash command register
Address
6516
76
5
4
3
2
1
0
76
5
4
3
2
1
0
00
0
Processor mode register 0
Internal memory access bus cycle select bit
Software reset bit
Interrupt priority detection time select bits
Clock
φ1 output select bit
Test mode bit
Processor mode bits
0 0 : Single-chip mode
0 1 : Memory expansion mode
1 ! : Do not select.
Fix this bit to “0.”
Note: For the description of processor mode register 0, refer to Figure 14
on the M37754M8C-XXXGP data sheet.
Address
5E16
Fig. 23 Processor mode register 0 bit configuration in CPU rewrit-
ing mode