參數(shù)資料
型號: M37754FFCGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 22/68頁
文件大?。?/td> 605K
代理商: M37754FFCGP
29
MITSUBISHI MICROCOMPUTERS
M37754FFCGP
M37754FFCHP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
Program command
Input command code 4016 in the first transfer. Proceed and input the
low-order 8 bits and the high-order 8 bits of the address and then
program data. Programming is initiated at the last rising edge of the
serial clock during program data transfer. The BUSY pin is driven
high during program operation. Programming is completed within 10
ms as measured by the built-in timer, and the BUSY pin is pulled low.
Note : A programming operation is not completed by executing the
program command once. Always be sure to execute a pro-
gram verify command after executing the program command.
In the case of failure in the verification, the user must repeat-
edly execute the program command until the pass in the veri-
fication. Refer to Figure 12 for the programming flowchart.
Program verify command
Input command code C016 in the first transfer. Proceed and drive the
__
OE pin low. When this is done, the M37754FFCGP and the
M37754FFCHP verify-read the programmed address’s contents,
__
and then latch it into the internal data latch. When the OE pin is re-
leased back high and serial clock is input to the SCLK pin, the verify
data that has been latched into the data latch is serially output from
the SDA pin.
Fig. 18 Timings during program verify
Fig. 17 Timings during programming
SCLK
BUSY
OE
SDA
tCH
A0
00000010
A7
A8
A15
D0
D7
tCH
tPC
Command code input (4016)
Program address input (L)
Program address input (H)
Program data input
tWP
Program
SCLK
BUSY
OE
SDA
D0
D7
tCRPV
Command code input (C016)
Verify data output
tWR
Verify read
tRC
Note: When outputting the verify data, the SDA pin is switched for output at the first falling edge of SCLK. The SDA pin is placed
in the floating state during the period of th(C-E) after the last rising edge of SCLK (at the 8th bit).
00000011
“L”
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