參數(shù)資料
型號： M37735S4LHP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, 12 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, FINE PITCH, PLASTIC, LQFP-80
文件頁數(shù)： 10/37頁
文件大?。?/td> 819K
代理商： M37735S4LHP
17
MITSUBISHI MICROCOMPUTERS
M37735S4LHP
16-BIT CMOS MICROCOMPUTER
New
product
Symbol
Parameter
Conditions
Ratings
Unit
Vcc
Power source voltage
–0.3 to +7
V
AVcc
Analog power source voltage
–0.3 to +7
V
VI
_____
Input voltage RESET, CNVss, BYTE
–0.3 to +12
V
Input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7,
P43 – P47, P50 – P57, P60 – P67, P70 – P77,
____ ___
P80 – P87, VREF, XIN, HOLD, RDY
Output voltage
___
P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA ,P42/
1
,
P43 – P47, P50 – P57, P60 – P67, P70 – P77, P80 – P87,
___
XOUT, RDE
Pd
Power dissipation
Ta = 25 °C
200
mW
Topr
Operating temperature
–40 to +85
°C
Tstg
Storage temperature
–65 to +150
°C
ABSOLUTE MAXIMUM RATINGS
VI
VO
–0.3 to Vcc + 0.3
V
–0.3 to Vcc + 0.3
V
Limits
Min.
Typ.
Max.
f(XIN) : Operating
2.7
5.5
f(XIN) : Stopped, f(XCIN) = 32.768 kHz
2.7
5.5
AVcc
Analog power source voltage
Vcc
V
Vss
Power source voltage
0V
AVss
Analog power source voltage
0
V
High-level input voltage
____ ___
HOLD
, RDY, P43 – P47, P50 – P57, P60 – P67, P70 – P77,
_____
P80 – P87, XIN, RESET, CNVss, BYTE, XCIN (Note 3)
High-level input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7
____ ___
Low-level input voltage HOLD, RDY, P43 – P47, P50 – P57, P60 – P67, P70 – P77,
_____
P80 – P87, XIN, RESET, CNVss, BYTE, XCIN (Note 3)
Low-level input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7
___
High-level peak output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA,
P42/
1
, P43 – P47, P50 – P57, P60 – P67,
P70 – P77, P80 – P87
___
High-level average output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA,
P42/
1
, P43 – P47, P50 – P57, P60 – P67,
P70 – P77, P80 – P87
___
Low-level peak output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA,
P42/
1
, P43, P54 – P57, P60 – P67, P70 – P77,
P80 – P87
Low-level peak output current P44 – P47, P50 – P53
___
Low-level average output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,
___
____
P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA,
P42/
1
, P43, P54 – P57,P60 – P67, P70 – P77,
P80 – P87
IOL(avg)
Low-level average output current P44 – P47, P50 – P53
12
mA
f(XIN)
Main-clock oscillation frequency (Note 4)
12
MHz
f(XCIN)
Sub-clock oscillation frequency
32.768
50
kHz
Unit
RECOMMENDED OPERATING CONDITIONS (Vcc = 2.7 – 5.5 V, Ta = –40 to +85 °C, unless otherwise noted)
Notes 1. Average output current is the average value of a 100 ms interval.
___
____
2. The sum of IOL(peak) for ports P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA and P8 must
___
be 80 mA or less, the sum of IOH(peak) for ports P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7, P30/WEL – P33/
____
HLDA
and P8 must be 80 mA or less, the sum of IOL(peak) for ports P4, P5, P6, and P7 must be 100 mA or less, and the sum of IOH(peak)
for ports P4, P5, P6, and P7 must be 80 mA or less.
3. Limits VIH and VIL for XCIN are applied when the sub clock external input selection bit = “1”.
4. The maximum value of f(XIN) = 6 MHz when the main clock division selection bit = “1”.
0.8 Vcc
0.5 Vcc
0
V
mA
Parameter
Symbol
Vcc
Power source voltage
Vcc
0.2Vcc
0.16Vcc
V
–10
–5
10
16
5
VIH
VIL
IOH(peak)
IOH(avg)
IOL(peak)
IOL(avg)
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