參數(shù)資料
型號： M37735S4LHP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MICROCONTROLLER, PQFP80
封裝： FINE PITCH, PLASTIC, QFP-80
文件頁數(shù)： 47/63頁
文件大?。?/td> 8367K
代理商： M37735S4LHP
CENTRAL PROCESSING UNIT (CPU)
7733 Group User’s Manual
2–13
The CPU and buses operate on the basis of different signals (Note). Between the CPU and buses,
therefore, data is passed or received via the BIU. Owing to the BIU’s operation, the CPU can operate at
high speed without waiting for the access by the low-speed memory I/O unit.
When an external device is connected, it is necessary to secure an access time according to the external
device’s timing specifications. In this case, in order to secure an access time, the BIU extends the duration
of signals required for the access.
Note: The CPU operates on the basis of
φCPU. The period of φCPU is normally the same as that of φ.
__
The internal buses operate on the basis of E. The period of E is at least twice that of
φ.
The BIU’s functions are described below.
(1) Reading out instruction (Instruction prefetch)
When the CPU does not request to read or write data, that is, when buses are not in use, the BIU
reads instructions from the memory and stores them in an instruction queue buffer. This is called
“instruction prefetch.”
The CPU reads instructions from the instruction queue buffer and executes them. Therefore, the CPU
can operate at high speed without waiting for the access by the low-speed memory.
When the instruction queue buffer becomes empty or stores only 1 byte of an instruction, the BIU
prefetches a new instruction code. The instruction queue buffer can store instructions up to 3 bytes.
The contents of the instruction queue buffer is initialized when a branch or jump instruction is executed
and the BIU reads a new instruction code from the destination address.
If instructions in the instruction queue buffer are insufficient for the CPU’s request, the BIU extends
the “L”-level duration of clock
φCPU in order to keep the CPU waiting until the BIU fetches the
requested number of instructions or more.
(2) Writing data to memory I/O
The CPU informs the BIU’s data address register of an address to which data is written and writes
the data to the data buffer. The BIU outputs the address received from the CPU to the address bus
and writes the data in the data buffer to the specified address.
While the BIU is writing data to the specified address, the CPU advances to the next process without
waiting for completion of BIU’s write operation.
Note that while the BIU uses buses for instruction prefetch, the BIU keeps the CPU waiting even when
the CPU requests to write data.
(3) Signal input/output for access to external device
When accessing external devices, the BIU inputs and outputs signals required for the access. (For
details, refer to chapter “12. CONNECTING EXTERNAL DEVICES.”)
2.2 Bus interface unit
相關(guān)PDF資料
PDF描述
M37735EHLHP 16-BIT, OTPROM, MICROCONTROLLER, PQFP80
M37753M6C-XXXFP 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP80
M37754M6C-XXXHP 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP100
M37754M6C-XXXGP 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP100
M37754M8C-XXXGP 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M37735T-PAC 制造商:Renesas Electronics Corporation 功能描述:DEV 7733 SIMPLE DEVELOPMENT TOOL PACKAGE - Bulk
M37736EHB 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:PROM VERSION OF M37736EHBXXXGP
M37736EHBGS 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:PROM VERSION OF M37736MHBXXXGP
M37736EHBXXXGP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:PROM VERSION OF M37736MHBXXXGP(MICROCOMPUTERS)
M37736EHL 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:PROM VERSION OF M37736MHLXXXHP(MICROCOMPUTERS)
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