CENTRAL PROCESSING UNIT (CPU)
7733 Group User’s Manual
2–4
2.1.4 Stack pointer (S)
The stack pointer (S) consists of 16 bits and is used for an interrupt, a subroutine call, or execution of an
addressing mode where a stack is used. The contents of S indicates a store address for a register and
so on during an interrupt or a subroutine call (stack area). The stack area is set in bank 016. (Refer to
section “2.1.6 Program bank register (PG).”)
When an interrupt request is accepted, the microcomputer stores the contents of the program bank register
(PG) into an address indicated by the contents of S and decrements the contents of S by 1. Then the
microcomputer stores the contents of the program counter (PC) and the processor status register (PS).
After acceptance of an interrupt request, the contents of S becomes [S] – 5. ([S] is the initial address that
the stack pointer (S) indicates when an interrupt request is accepted.) (Refer to Figure 2.1.2.)
After processing in an interrupt routine is finished, processing for return to the original routine is performed
as follows.
When the RTI instruction is executed, the contents of registers which were stored in the stack area are
restored into the original registers. (The contents are restored PS, PC, and PG in that order.) The contents
of S is also returned to the state before acceptance of an interrupt request.
During a subroutine call, the same processing as for an interrupt is performed. The contents of PS,
however, are not automatically stored. (The contents of PG may not be stored. This depends on the
addressing mode.)
During an interrupt or a subroutine call, registers other than the above registers are not automatically
stored. Therefore, be sure to store necessary registers by software.
The contents of S is undefined at reset. Therefore, be sure to initialize S at the start of a program.
Furthermore, a stack area changes according to subroutine’s nesting or acceptance of multiple interrupts’
requests. Therefore, give careful consideration to subroutine’s nesting depth not to destroy the necessary
data.
g Refer to “7700 Family Software Manual” for addressing modes.
Fig. 2.1.2 Stored registers in stack area
g [S] is the initial address that the stack pointer (S) indicates when
an interrupt request is accepted.
S’s contents is “[S] – 5” after all of the above registers are pushed.
Address
[S] – 4
[S] – 3
[S] – 2
[S] – 1
[S]
Processor status register’s low-order byte (PSL)
Stack area
[S] – 5
Processor status register’s high-order byte (PSH)
Program counter’s low-order byte (PCL)
Program counter’s high-order byte (PCH)
Program bank register (PG)
2.1 Central processing unit