- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370847 > M37702S1BFP (Mitsubishi Electric Corporation) Single Chip 16 Bits CMOS Microcomputer(16位單片機) PDF資料下載
參數(shù)資料
| 型號： | M37702S1BFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Single Chip 16 Bits CMOS Microcomputer(16位單片機) |
| 中文描述： | 單片微機16位的CMOS（16位單片機） |
| 文件頁數(shù)： | 13/59頁 |
| 文件大小： | 811K |
| 代理商： | M37702S1BFP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁
13
MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts caused by a BRK instruction and when dividing by zero
are software interrupts and are not included in this list.
Other interrupts previously mentioned are A-D converter, UART,
Timer, INT interrupts. The priority of these interrupts can be
changed by changing the priority level in the corresponding inter-
rupt control register by software.
Figure 8 shows a diagram of the interrupt priority resolution circuit.
When an interrupt is caused, the each interrupt device compares
its own priority with the priority from above and if its own priority is
higher, then it sends the priority below and requests the interrupt.
If the priorities are the same, the one above has priority.
This comparison is repeated to select the interrupt with the highest
priority among the interrupts that are being requested. Finally the
selected interrupt is compared with the processor interrupt priority
level (IPL) contained in the processor status register (PS) and the
request is accepted if it is higher than IPL and the interrupt disable
____
rupt disable flag I.
When an interrupt is accepted, the contents of the processor sta-
tus register (PS) is saved to the stack and the interrupt disable
flag I is set to “1”.
Furthermore, the interrupt request bit of the accepted interrupt is
cleared to “0” and the processor interrupt priority level (IPL) in the
processor status register (PS) is replaced by the priority level of
the accepted interrupt.
Therefore, multi-level priority interrupts are possible by resetting
the interrupt disable flag I to “0” and enable further interrupts.
For reset, DBC, watchdog timer, zero divide, and BRK instruction
interrupts, which do not have an interrupt control register, the pro-
cessor interrupt level (IPL) is set as shown in Table 3.
Priority resolution is performed by latching the interrupt request bit
and interrupt priority level so that they do not change. They are
sampled at the first half and latched at the last half of the opera-
tion code fetch cycle.
Because priority resolution takes some time, no sampling pulse is
generated for a certain interval even if it is the next operation code
fetch cycle.
Fig. 7 Interrupt priority
Fig. 8 Interrupt priority resolution
Interrupt control registers
A-D conversion interrupt control register
UART0 transmit interrupt control register
UART0 receive interrupt control register
UART1 transmit interrupt control register
UART1 receive interrupt control register
Timer A0 interrupt control register
Timer A1 interrupt control register
Timer A2 interrupt control register
Timer A3 interrupt control register
Timer A4 interrupt control register
Timer B0 interrupt control register
Timer B1 interrupt control register
0
interrupt control register
1
interrupt control register
INT
2
interrupt control register
Addresses
000070
16
000071
16
000072
16
000073
16
000074
16
000075
16
000076
16
000077
16
000078
16
000079
16
00007A
16
00007B
16
00007C
16
00007D
16
00007E
16
00007F
16
Table 2. Addresses of interrupt control registers
Priority is determined by hardware
3
4
Watchdog
timer
DBC
Reset
A-D converter, UART, Timer, INT interrupts
Priority can be changed with software inside
1
2
4
Wtimer
A-D conversion
Level 0
INT
0
UART1 transmit
UART1 receive
UART0 transmit
UART0 receive
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Timer A1
Timer A0
INT
2
INT
1
IPL
Interrupt disable flag I
DBC
Reset
Interrupt request
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37702M2A | Single Chip 16 Bits CMOS Microcomputer(16位單片機) |
| M37702M2B | Single Chip 16 Bits CMOS Microcomputer(16位單片機) |
| M37702M2AXXXFP | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2A-278FP | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2A-XXXFP | DIODE SCHOTTKY DUAL SERIES 50V 150mW 0.41V-vf 70mA-IFM 1mA-IF 0.1uA-IR SOT-523 3K/REEL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37702S1LGP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702S1LHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702S4AFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702S4BFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702TL-HPD | 制造商:Renesas Electronics Corporation 功能描述:DEV 7702 GROUP 25MHZ EMUL POD (LOW VOLTA - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。