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參數(shù)資料
| 型號： | M37641F8HP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 20/149頁 |
| 文件大?。?/td> | 1997K |
| 代理商： | M37641F8HP |
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20
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7641 Group
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
INTERRUPTS
There are twenty-four interrupt sources: five externals, eighteen
internals, and one software.
Interrupt Control
Each interrupt except the BRK instruction interrupt has both an Inter-
rupt Request Bit and an Interrupt Enable Bit, and is controlled by the
Interrupt Disable Flag (I). An interrupt occurs if the corresponding
Interrupt Request and Enable Bits are
“
1
”
and the Interrupt Disable
Flag is
“
0
”
.
Interrupt Enable Bits can be set or cleared by software. Interrupt Re-
quest Bits can be cleared by software, but cannot be set by software.
Additionally, an active edge of INT
1
and INT
2
can be selected by
using the interrupt edge select register (address 0011
16
); an active
edge of CNTR
0
can be done by using the timer X mode register
(address 0027
16
); an active edge of CNTR
1
can be done by using
the timer Y mode register (address 0028
16
).
The BRK instruction interrupt and reset cannot be disabled with any
flag or bit. The I Flag disables all interrupts except the BRK instruc-
tion interrupt and reset. If several interrupts requests occur at the
same time, the interrupt with the highest priority is accepted first.
Interrupt Operation
When an interrupt request occurs, the following operations are auto-
matically performed:
1.The processing being executed is stopped.
2.The contents of the program counter and processor status reg-
ister are automatically pushed onto the stack.
3.The Interrupt Disable Flag is set and the corresponding in-
terrupt request bit is cleared.
4.The interrupt jump destination address is read from the vector
table into the program counter.
I
Notes
When setting the followings, the interrupt request bit may be set to
“
1
”
.
When setting external interrupt active edge
Related register: Interrupt polarity select register (address 0011
16
)
Timer X mode register (address 0027
16
)
Timer Y mode register (address 0028
16
)
When not requiring for the interrupt occurrence synchronized with
these setting, take the following sequence.
Set the corresponding Interrupt Enable Bit to
“
0
”
(disabled).
Set the Interrupt Edge Select Bit (Active Edge Switch Bit).
Set the corresponding Interrupt Request Bit to
“
0
”
after 1 or more
instructions have been executed.
Set the corresponding Interrupt Enable Bit to
“
1
”
(enabled).
Fig. 16 Interrupt control
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e
b
s
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e
t
b
b
i
i
t
t
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e
p
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t
e
r
r
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d
i
s
a
b
l
e
f
l
a
g
(
I
)
BRK instruction
Reset
Interrupt request
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M37641F8HP#U0 | 功能描述:IC 740 MCU FLASH 32K 80LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/7600 產(chǎn)品培訓模塊:Graphics LCD System and PIC24 Interface Asynchronous Stimulus 標準包裝:27 系列:PIC® 24H 核心處理器:PIC 芯體尺寸:16-位 速度:40 MIP 連通性:I²C，SPI，UART/USART 外圍設備:欠壓檢測/復位，POR，PWM，WDT 輸入/輸出數(shù):21 程序存儲器容量:12KB（4K x 24） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 3.6 V 數(shù)據(jù)轉換器:A/D 10x10b/12b 振蕩器型:內部 工作溫度:-40°C ~ 85°C 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 包裝:管件 產(chǎn)品目錄頁面:648 (CN2011-ZH PDF) 配用:AC164339-ND - MODULE SKT FOR PM3 28SOICDV164033-ND - KIT START EXPLORER 16 MPLAB ICD2 |
| M37641F8M8-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641F8-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641F8-XXXHP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641M8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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