參數(shù)資料
型號： M37641F8-XXXHP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機
文件頁數(shù)： 119/149頁
文件大小： 1997K
代理商： M37641F8-XXXHP
119
7641 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
G
Erase All Blocks Command (20
16
/20
16
)
By writing the command code
“
20
16
”
in the first bus cycle and the
confirmation command code
“
20
16
”
in the second bus cycle that
follows, the erase all blocks (erase and erase verify) operation
starts.
Whether the erase all blocks command is terminated can be con-
firmed by reading the status register or the RY/BY signal status .
When the erase all blocks operation starts, the read status regis-
ter mode is entered automatically and the contents of the status
register can be read out at the data I/O pins (DB
0
to DB
7
). The
status register bit 7 (SR7) is set to
“
0
”
at the same time the erase
operation starts and is returned to
“
1
”
upon completion of the
erase operation. In this case, the read status register mode re-
mains active until another command is written.
The RY/BY pin is
“
L
”
during erase operation and
“
H
”
when the
erase operation is completed as is the status register bit 7 (SR7).
At erase all blocks end, erase results can be checked by reading
the status register. For details, refer to the section where the sta-
tus register is detailed.
G
Block Erase Command (20
16
/D0
16
)
By writing the command code
“
20
16
”
in the first bus cycle and the
confirmation command code
“
D0
16
”
in the second bus cycle that
follows to the block address of a flash memory block, the block
erase (erase and erase verify) operation starts.
Whether the block erase operation is completed can be confirmed
by reading the status register or the RY/BY pin state. When the
block erase operation starts, the read status register mode is en-
tered automatically and the contents of the status register can be
read out at the data I/O pins (DB
0
to DB
7
). The status register bit
7 (SR7) is set to
“
0
”
at the same time the block erase operation
starts and is returned to
“
1
”
upon completion of the block erase
operation. In this case, the read status register mode remains ac-
tive until the read array command (FF
16
) is written.
The RY/BY pin is
“
L
”
during block erase operation and
“
H
”
when
the block erase operation is completed as is the status register bit
7 (SR7).
At block erase operation end, erase results can be checked by
reading the status register. For details, refer to the section where
the status register is detailed.
Figure 100 shows the erase flowchart.
Fig. 100 Erase flowchart
W
r
i
t
e
2
0
1
6
2
o
0
1
c
k
6
/
a
D
d
0
1
d
6
e
B
l
r
s
s
Erase completed
(Write read command FF
16
)
NO
YES
S
t
a
r
t
W
r
i
t
e
SR5 = 0
Erase error
Y
E
S
NO
2
D
0
1
0
1
6
:
6
:
E
B
r
l
a
o
s
c
e
k
a
e
l
r
l
a
b
s
l
o
e
c
k
s
SR 7 = 1
or
RY/BY = 1
Status register
read
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