參數(shù)資料
型號： M37560EFDFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 53/92頁
文件大小： 1507K
代理商： M37560EFDFP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
54
Fig. 59 Oscillator circuit
Fig. 60 External clock input circuit
CLOCK GENERATING CIRCUIT
The 7560 group has two built-in oscillation circuits: main clock
XIN-XOUT oscillation circuit and sub-clock XCIN-XCOUT oscillation
circuit. An oscillation circuit can be formed by connecting an oscil-
lator between XIN and XOUT (XCIN and XCOUT). Use the circuit
constants in accordance with the oscillator manufacturer’s recom-
mended values. No external resistor is needed between XIN and
XOUT since a feed-back resistor exists on-chip. However, an exter-
nal feed-back resistor is needed between XCIN and XCOUT since a
resistor does not exist between them.
To supply a clock signal externally, input it to the XIN pin and make
the XOUT pin open. The sub-clock oscillation circuit cannot directly
input clocks that are externally generated. Accordingly, be sure to
cause an external oscillator to oscillate.
Immediately after poweron, only the XIN oscillation circuit starts
oscillating, and XCIN and XCOUT pins go to high-impedance state.
Frequency Control
(1) Middle-speed mode
The clock input to the XIN pin is divided by 8 and it is used as the
system clock
φ.
After reset, this mode is selected.
(2) High-speed mode
The clock input to the XIN pin is divided by 2 and it is used as the
system clock
φ.
(3) Low-speed mode
The clock input to the XCIN pin is divided by 2 and it is used as
the system clock
φ.
A low-power consumption operation can be realized by stopping
the main clock in this mode. To stop the main clock, set the main
clock stop bit of the CPU mode register to “1”.
When the main clock is restarted, after setting the main clock
stop bit to “0”, set enough time for oscillation to stabilize by pro-
gram.
Note: If you switch the mode between middle/high-speed and low-
speed, stabilize both XIN and XCIN oscillations. The suffi-
cient time is required for the sub clock to stabilize, espe-
cially immediately after poweron and at returning from stop
mode. When switching the mode between middle/high-
speed and low-speed, set the frequency in the condition
that f(XIN) > 3f(XCIN).
Oscillation Control
(1) Stop mode
If the STP instruction is executed, the system clock
φ stops at an
“H” level, and main and sub clock oscillators stop.
In this time, values set previously to timer 1 latch and timer 2 latch
are loaded automatically to timer 1 and timer 2. Before the STP
instruction, set the values to generate the wait time required for
oscillation stabilization to timer 1 latch and timer 2 latch (low-order
8 bits are set to timer 1, high-order 8 bits are set to timer 2). Either
f(XIN) or f(XCIN) divided by 16 is input to timer 1 as count source,
and the output of timer 1 is connected to timer 2.
The bits of the timer 123 mode register except bit 4 are set to “0”.
Set the timer 1 and timer 2 interrupt enable bits to “0” before ex-
ecuting the STP instruction.
Oscillation restarts at reset or when an external interrupt is re-
ceived, but the system clock
φ is not supplied to the CPU until
timer 2 underflows. This allows time for the clock circuit oscillation
to stabilize when a ceramic resonator is used.
(2) Wait mode
If the WIT instruction is executed, only the system clock
φ stops at
an “H” state. The states of main clock and sub clock are the same
as the state before the executing the WIT instruction, and oscilla-
tion does not stop. Since supply of internal clock
φ is started im-
mediately after the interrupt is received, the instruction can be ex-
ecuted immediately.
XCIN
CIN
COUT
CCIN
CCOUT
Rf
Rd
XCOUT
XIN
XOUT
XIN
XOUT
External oscillation circuit
Open
VCC
VSS
CCIN
CCOUT
Rf
Rd
XCIN
XCOUT
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