參數(shù)資料
型號: M37560EFDFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 44/92頁
文件大小: 1507K
代理商: M37560EFDFP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
46
Voltage Multiplier (3 Times)
The voltage multiplier performs threefold boosting. This circuit in-
puts a reference voltage for boosting from LCD power input pin
VL1.
Set each bit of the segment output enable register and the LCD
mode register in the following order for operating the voltage mul-
tiplier.
1. Set the segment output enable bits (bits 0 to 5) of the seg-
ment output enable register to “0” or “1”.
2. Set the duty ratio selection bits (bits 0 and 1), the bias con-
trol bit (bit 2), the LCD circuit divider division ratio selection
bits (bits 5 and 6), and the LCDCK count source selection
bit (bit 7) of the LCD mode register to “0” or “1”.
3. Set the LCD output enable bit (bit 6) of the segment output
enable register to “1”. Apply the limit voltage or less to the
VL1 pin.
4. Set the voltage multiplier control bit (bit 4) of the LCD mode
register to “1”. However, be sure to select 1/3 bias for bias
control.
When voltage is input to the VL1 pin during operating the voltage
multiplier, voltage that is twice as large as VL1 occurs at the VL2
pin, and voltage that is three times as large as VL1 occurs at the
VL3 pin.
sNotes on Voltage Multiplier
When using the voltage multiplier, apply the limit voltage or less to
the VL1 pin, then set the voltage multiplier control bit to “1” (en-
abled).
When not using the voltage multiplier, set the LCD output enable
bit to “1”, then apply proper voltage to the LCD power input pins
(VL1–VL3).
When the LCD output enable bit is set to “0” (disabled), the VCC
voltage is applied to the VL3 pin inside of this microcomputer.
Fig. 48 Example of circuit at each bias
Table 12 Bias control and applied voltage to VL1–VL3
Bias value
1/3 bias
1/2 bias
Voltage value
VL3=VLCD
VL2=2/3 VLCD
VL1=1/3 VLCD
VL3=VLCD
VL2=VL1=1/2 VLCD
Note : VLCD is the maximum value of supplied voltage for the
LCD panel.
Bias Control and Applied Voltage to LCD
Power Input Pins
To the LCD power input pins (VL1–VL3), apply the voltage shown
in Table 12 according to the bias value.
Select a bias value by the bias control bit (bit 2 of the LCD mode
register).
VL3
VL2
C2
C1
VL1
1/3 bias
when using the voltage multiplier
VL3
VL2
C2
C1
VL1
1/3 bias
when not using the voltage multiplier
Open
R2
R1
R3
R1=R2=R3
Contrast control
VL3
VL2
C2
C1
VL1
1/2 bias
Open
R4
R5
R4=R5
Contrast control
PXx
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相關代理商/技術參數(shù)
參數(shù)描述
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