參數(shù)資料
型號: M37271MF-231SP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù): 30/97頁
文件大?。?/td> 1436K
代理商: M37271MF-231SP
MITSUBISHI MICROCOMPUTERS
M37271MF-XXXSP
M37271EF-XXXSP, M37271EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
30
0
0
0
0
7
Data slicer control register 1
(DSC1: address 00EA
16
)
Data slicer control bit
0: Data slicer stopped
1: Data slicer operating
Field to be sliced data selection bit
Fix this bit to “0.”
Data latch completion flag for caption
data in main data slice line
0: Data is not yet latched
1: Data is latched
Field determination flag
0
0
0
0
7
H
sep
V
sep
H
sep
V
sep
0 :
1 :
Field of main data
slice line
Field for setting
reference voltage
F2
F1
F2
F1
b2 b1
0 0 F2
0 1 F1
1 0 F1 and F2
1 1 F1 and F2
Definition of fields 1 (F1) and 2 (F2)
H
sep
V
SYNC
V
sep
F1 :
H
sep
V
SYNC
V
sep
F2 :
F2
F1
F2
F1
0
7
Data slicer control register 3
(DSC3: address 0210
16
)
Line selection bit for slice voltage
0: Main data slice line
1: Sub-data slice line
Field of sub-data
slice line
b2 b1
0 0 F2
0 1 F1
1 0 F1 and F2
1 1 F1 and F2
Field to be sliced data selection bit
Setting bit of sub-data slice line
Field for setting
reference voltage
Fix these bits to “0.”
Data slicer control register 2
(DSC2: address 00EB
16
)
Timing signal generating circuit
control bit
0: Stopped
1: Operating
Reference clock source selection
bit
0: Video signal
1: H
SYNC
signal
Test bit: read-only
Fix these bits to “0.”
V-pulse shape determination flag
0: Match
1: Mismatch
Fix this bit to “0.”
Test bit: read-only
Figure 23 shows the structure of the data slicer control registers.
Fig. 23. Structure of data slicer control registers
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