參數(shù)資料
型號: M37161MA-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42
封裝: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁數(shù): 48/129頁
文件大?。?/td> 1092K
代理商: M37161MA-XXXSP
Rev.1.00
2003.11.25
page 25 of 128
M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
Fig. 8.4.5 Timer Block Diagram
Timer 1 (8)
1/4096
1/2
CM7
TM15
1/8
Timer 1 latch (8)
8
TM10
TM12
TM14
TM11
TM13
Timer 2 (8)
Timer 2 latch (8)
8
Timer 3 (8)
Timer 3 latch (8)
8
Timer 4 (8)
Timer 4 latch (8)
8
Timer 5 (8)
Timer 5 latch (8)
8
Timer 6 (8)
Timer 6 latch (8)
8
Data bus
Timer 1
interrupt request
Timer 2
interrupt request
Timer 3
interrupt request
Reset
STP instruction
TM20
TM22
T3SC
Timer 4
interrupt request
TM24
TM23
TM21
TM16
Timer 5
interrupt request
TM27
TM25
Timer 6
interrupt request
TM17
TM26
TM21
TIM2
TIM3
Selection gate: Connected to
black side at
reset
TM1 : Timer mode register 1
TM2 : Timer mode register 2
T3SC : Timer 3 count source
switch bit (address 00C716)
CM : CPU mode register
Notes 1: HIGH pulse width of external clock inputs TIM2 and TIM3 needs 4 machine cycles or more.
2: When the external clock source is selected, timers 1, 2, and 3 are counted at a rising edge of input signal.
FF16
0716
3: In the stop mode or the wait mode, external clock inputs TIM2 and TIM3 cannot be used.
XCIN
XIN
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