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參數(shù)資料
| 型號： | M34551 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTER |
| 中文描述： | 單芯片4位CMOS微機紅外遙控器 |
| 文件頁數(shù)： | 26/68頁 |
| 文件大?。?/td> | 698K |
| 代理商： | M34551 |
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26
MITSUBISHI MICROCOMPUTERS
4551 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for
INFRARED REMOTE CONTROL TRANSMITTER
LCD FUNCTION
The 4551 Group has an LCD (Liquid Crystal Display) controller/
driver. When proper voltage is applied to the LCD power supply
input pins and data are set in timer control registers (W2, W3),
timer LC, LCD control registers (L1, L2), and LCD RAM, the LCD
controller/driver automatically reads the display data and controls
the LCD display by setting duty and bias.
4 common signal output pins and 20 segment signal output pins
can be used to drive the LCD. By using these pins, up to 80
segments (when 1/4 duty and 1/3 bias are selected) can be
controlled to display. When the required number of segment pins
is 19 or less, pins SEG
16
–SEG
19
(4) can be used as input ports
P2
0
–P2
3
.
(1) Duty and bias
There are 3 combinations of duty and bias for displaying data
on the LCD. Use bits 0 and 1 of LCD control register (L1) to
select the proper display method for the LCD panel being
used.
G
1/2 duty, 1/2 bias
G
1/3 duty, 1/3 bias
G
1/4 duty, 1/3 bias
Table 12 Duty and maximum number of displayed pixels
Duty
1/2
1/3
1/4
80 segments
Note: Leave unused COM pins open.
(2) LCD clock control
The LCD clock is determined by the timer 2 count source
selection bit (W2
3
), timer LC control bit (W3
0
), and timer LC.
Accordingly, the frequency (F) of the LCD clock is obtained
by the following formula. Numbers (
to
) shown below the
formula correspond to numbers in Figure 24, respectively.
G
When using the prescaler output (ORCLK) as timer 2 count
source (W2
3
=“1”)
F = ORCLK
G
When using the f(X
CIN
) as timer 2 count source (W2
3
=“0”)
F = f(X
CIN
)
[LC: 0 to 15]
The frame frequency and frame period for each display
method can be obtained by the following formula:
Frame frequency =
(Hz)
Frame period =
(s)
F: LCD clock frequency
1/n: Duty
Fig. 24 LCD clock control circuit structure
Used COM pins
COM
0
, COM
1
(Note)
COM
0
–COM
2
(Note)
COM
0
–COM
3
Maximum number of displayed pixels
40 segments
60 segments
1
16
1
LC + 1
1
2
1
16
1
LC + 1
1
2
F
n
n
F
Note: Count source is stopped by clearing to “0.”
STCK
1/2
Timer LC
1/16
W3
0
0
1
(Note)
X
CIN
ORCLK
W2
3
0
1
W3
1
1
0
LCD clock
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