
Rev.2.00
Jul 27, 2004
page 65 of 159
REJ03B0091-0200Z
4524 Group
Key-on wakeup control register K0 ......................................................................................
Key-on wakeup control register K1 ......................................................................................
Key-on wakeup control register K2 ......................................................................................
Pull-up control register PU0 .................................................................................................
Pull-up control register PU1 .................................................................................................
Port output structure control register FR0 ...........................................................................
Port output structure control register FR1 ...........................................................................
Port output structure control register FR2 ...........................................................................
Port output structure control register FR3 ...........................................................................
Carry flag (CY) ......................................................................................................................
Register A .............................................................................................................................
Register B .............................................................................................................................
Register D .............................................................................................................................
Register E .............................................................................................................................
Register X .............................................................................................................................
Register Y .............................................................................................................................
Register Z .............................................................................................................................
Stack pointer (SP) ................................................................................................................
Operation source clock .......................................................... On-chip oscillator (operating)
Ceramic resonator circuit ..................................................................................... Operating
RC oscillation circuit ...................................................................................................... Stop
Quartz-crystal oscillator ........................................................................................ Operating
“” represents undefined.
Fig. 51 Internal state at reset
0
000
0
000
0
000
0
000
0
000
0
000
0
000
0
000
0
000
0
000
0
000
0
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111