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參數(shù)資料
| 型號： | M34524M8-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 42/66頁 |
| 文件大小： | 1936K |
| 代理商： | M34524M8-XXXFP |
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Rev.1.04
Aug 23, 2007
Page 47 of 146
REJ03B0188-0104
4559 Group
(6) LCD control register
LCD control register L1
Register L1 controls duty/bias selection, LCD operation, internal
dividing resistor selection. Set the contents of this register
through register A with the TL1A instruction. The TAL1
instruction can be used to transfer the contents of register L1.
LCD control register L2
Register L2 controls internal dividing resistor operation,
selection of pin functions; SEG0/VLC3, SEG1/VLC2, SEG2/VLC1.
Set the contents of this register through register A with the TL2A
instruction.
LCD control register L3
Register L3 controls selection of pin functions; P20/SEG24 to
P23/SEG27. Set the contents of this register through register A
with the TL3A instruction.
LCD control register C1
Register C1 controls selection of pin functions; P00/SEG16 to
P03/SEG19. Set the contents of this register through register A
with the TC1A instruction.
LCD control register C2
Register C2 controls selection of pin functions; P10/SEG20 to
P13/SEG23. Set the contents of this register through register A
with the TC2A instruction.
LCD control register C3
Register C3 controls selection of pin functions; P30/SEG28 to
P33/SEG31. The contents of this register through register A with
the TC3A instruction.
Note 1.“R” represents read enabled, and “W” represents write enabled.
Note 2.“r (resistor) multiplied by 3” is used at 1/3 bias, and “r multiplied by 2” is used at 1/2 bias.
Note 3.VLC3 is connected to VDD internally when SEG0 pin is selected.
Note 4.Use internal dividing resistor when SEG1 and SEG2 pins are selected.
Table 19 LCD control registers (1)
LCD control register L1
at reset : 00002
at power down : state retained
R/W
TAL1/TL1A
L13
Internal dividing resistor for LCD power
supply selection bit (Note 2)
0
2r × 3, 2r × 2
1
r × 3, r × 2
L12
LCD control bit
0Stop (OFF)
1
Operating
LCD duty and bias selection bits
L11
L1
Duty
Bias
L11
0
Not available
01
1/2
10
1/3
L10
11
1/4
1/3
LCD control register L2
at reset : 00002
at power down : state retained
W
TL2A
L23
SEG0/VLC3 pin function switch bit (Note 3)
0
SEG0
1VLC3
L22
SEG1/VLC2 pin function switch bit (Note 4)
0
SEG1
1VLC2
L21
SEG2/VLC1 pin function switch bit (Note 4)
0
SEG2
1VLC1
L20
Internal dividing resistor for LCD power
supply control bit
0
Internal dividing resistor valid
1
Internal dividing resistor invalid
LCD control register L3
at reset : 11112
at power down : state retained
W
TL3A
L33
P23/SEG27 pin function switch bit
0
SEG27
1P23
L32
P22/SEG26 pin function switch bit
0
SEG26
1P22
L31
P21/SEG25 pin function switch bit
0
SEG25
1P21
L30
P20/SEG24 pin function switch bit
0
SEG24
1P20
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