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參數(shù)資料
| 型號： | M34514M8 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片4位微機的CMOS |
| 文件頁數(shù)： | 35/106頁 |
| 文件大?。?/td> | 1304K |
| 代理商： | M34514M8 |
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35
4513/4514 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
Fig. 23 Serial I/O register state when transferring
(1) Serial I/O register SI
Serial I/O register SI is the 8-bit data transfer serial/parallel conver-
sion register. Data can be set to register SI through registers A and
B with the TSIAB instruction. The contents of register A is transmit-
ted to the low-order 4 bits of register SI, and the contents of
register B is transmitted to the high-order 4 bits of register SI.
During transmission, each bit data is transmitted LSB first from the
lowermost bit (bit 0) of register SI, and during reception, each bit
data is received LSB first to register SI starting from the topmost bit
(bit 7).
When register SI is used as a work register without using serial I/O,
pull up the S
CK
pin or set the pin function to an input port P2
0
.
(2) Serial I/O transmission/reception
completion flag (SIOF)
Serial I/O transmission/reception completion flag (SIOF) is set to
“1” when serial data transmission or reception completes. The
state of SIOF flag can be examined with the skip instruction
(SNZSI). Use the interrupt control register V2 to select the inter-
rupt or the skip instruction.
The SIOF flag is cleared to “0” when the interrupt occurs or when
the next instruction is skipped with the skip instruction.
When transmitting (D
7
–D
0
: transfer data)
When receiving
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
S
IN
pin
S
OUT
pin
S
OUT
pin
S
IN
pin
Serial I/O register (SI)
Serial I/O register (SI)
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
1
D
0
Transfer data to be set
Transfer started
Transfer completed
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
(3) Serial I/O start instruction (SST)
When the SST instruction is executed, the SIOF flag is cleared to
“0” and then serial I/O transmission/reception is started.
(4) Serial I/O mode register J1
Register J1 controls the synchronous clock, P2
0
/S
CK
, P2
1
/S
OUT
and P2
2
/S
IN
pin function. Set the contents of this register through
register A with the TJ1A instruction. The TAJ1 instruction can be
used to transfer the contents of register J1 to register A.
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