4509 Group
Rev.1.03
2009.07.27
page 77 of 140
REJ03B0147-0103
Symbol
A
B
DR
E
Q1
V1
V2
I1
W1
W2
W5
W6
FR0
FR1
FR2
FR3
C1
J1
MR
K0
K1
K2
L1
PU0
PU1
PU2
X
Y
Z
DP
PC
PCH
PCL
SK
SP
CY
Contents
Register A (4 bits)
Register B (4 bits)
Register D (3 bits)
Register E (8 bits)
A/D control register Q1 (4 bits)
Interrupt control register V1 (4 bits)
Interrupt control register V2 (4 bits)
Interrupt control register I1 (4 bits)
Timer control register W1 (4 bits)
Timer control register W2 (4 bits)
Timer control register W5 (4 bits)
Timer control register W6 (4 bits)
Port output structure control register FR0 (4 bits)
Port output structure control register FR1 (4 bits)
Port output structure control register FR2 (4 bits)
Port output structure control register FR3 (4 bits)
Port output structure control register C1 (4 bits)
Serial interface control register J1 (4 bits)
Clock control register MR (4 bits)
Key-on wakeup control register K0 (4 bits)
Key-on wakeup control register K1 (4 bits)
Key-on wakeup control register K2 (4 bits)
Key-on wakeup control register L1 (4 bits)
Pull-up control register PU0 (4 bits)
Pull-up control register PU1 (4 bits)
Pull-up control register PU2 (4 bits)
Register X (4 bits)
Register Y (4 bits)
Register Z (2 bits)
Data pointer (10 bits)
(It consists of registers X, Y, and Z)
Program counter (14 bits)
High-order 7 bits of program counter
Low-order 7 bits of program counter
Stack register (14 bits 8)
Stack pointer (3 bits)
Carry flag
Contents
Prescaler reload register (8 bits)
Timer 1 reload register (8 bits)
Timer 2 reload register (8 bits)
Prescaler
Timer 1
Timer 2
Timer 1 interrupt request flag
Timer 2 interrupt request flag
Watchdog timer flag
Watchdog timer enable flag
Interrupt enable flag
External 0 interrupt request flag
Power down flag
A/D conversion completion flag
Serial interface transmit/receive completion flag
Port D (6 bits)
Port P0 (4 bits)
Port P1 (4 bits)
Port P2 (2 bits)
Port P3 (2 bits)
Hexadecimal variable
Hexadecimal constant
Binary notation of hexadecimal variable A
(same for others)
Direction of data movement
Data exchange between a register and memory
Decision of state shown before “?”
Contents of registers and memories
Negate, Flag unchanged after executing instruction
RAM address pointed by the data pointer
Label indicating address a6 a5 a4 a3 a2 a1 a0
in page p6 p5 p4 p3 p2 p1 p0
Hex. C + Hex. number x (also same for others)
Symbol
RPS
R1L
R1H
R2L
R2H
PS
T1
T2
T1F
T2F
WDF1
WEF
INTE
EXF0
P
ADF
SIOF
D
P0
P1
P2
P3
x
y
z
p
n
i
j
A3A2A1A0
←
?
( )
—
M(DP)
a
p, a
C
+
x
Note : The 4509 Group just invalidates the next instruction when a skip is performed. The contents of program counter is not increased by 2. Accordingly, the
number of cycles does not change even if skip is not performed. However, the cycle count becomes “1” if the TABP p, RT, or RTS instruction is skipped.
INSTRUCTIONS
Each instruction is described as follows;
(1) Index list of instruction function
(2) Machine instructions (index by alphabet)
(3) Machine instructions (index by function)
(4) Instruction code table
SYMBOL
The symbols shown below are used in the following list of instruction
function and the machine instructions.