參數(shù)資料
型號(hào)： M34280M1-XXXGP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝： 0.225 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20
文件頁(yè)數(shù)： 27/48頁(yè)
文件大?。?/td> 605K
代理商： M34280M1-XXXGP
Skip condition
Detailed description
Carry
flag
CY
35
34
Instruction code
Function
Mnemonic
Hexadecimal
notation
Number
of
words
Number
of
cycles
Parameter
Type of
instructions
D8 D7 D6 D5 D4 D3 D2 D1 D0
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
MITSUBISHI MICROCOMPUTERS
4280 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
MACHINE INSTRUCTIONS (CONTINUED)
Input/Output
operation
01 1
01 4
01 5
02 4
02 B
08 4
05 6
08 0
02 8
00
0
00
D
00
3
05
9
05
8
08
2
08
F
00
F
CLD
RD
SD
SZD
OEA
IAE
OGA
IAG
NOP
POF
SNZP
CCK
TLOA
URSC
TPU0A
WRST
0
00010
001
0
00010
100
0
00010
101
0
00100
100
0
00101
011
0
10000
100
0
01010
110
0
10000
000
0
00101
000
0
00000
000
0
00001
101
0
00000
011
0
01011
001
0
01011
000
0
10000
010
0
10001
111
0
00001
111
1
2
1
2
1
(D)
← 0
(D(Y))
← 0
(Y) = 0 to 7
(D(Y))
← 1
(Y) = 0 to 7
(D(Y)) = 0 ?
(Y) = 7
(E1, E0)
← (A1, A0)
(A2–A0)
← (E2–E0)
(G)
← (A)
(A)
← (G)
(PC)
← (PC) + 1
RAM back-up
(P) = 1 ?
STCK changes to f(XIN)
(LO1, LO0)
← (A1, A0)
(URS)
← 1
(PU02–PU00)
← (A2–A0)
(WDF1)
← 0
–
(D(Y)) = 0
(Y) = 7
–
(P) = 1
–
Clears (0) to port D (high-impedance state).
Clears (0) to a bit of port D specified by register Y (high-impedance state).
Sets (1) to a bit of port D specified by register Y.
Skips the next instruction when a bit of port D specified by register Y is “0.”
Outputs the contents of register A to port E.
Transfers the contents of port E to register A.
Outputs the contents of register A to port G.
Transfers the contents of port G to register A.
No operation
Puts the system in RAM back-up state.
Skips the next instruction when P flag is “1.”
After skipping, P flag remains unchanged.
System clock (STCK) changes to f(XIN) from f(XIN)/8. Execute this CCK instruction at address 0 in page
0.
Transfers the contents of register A to the logic operation selection register LO.
Sets the most significant ROM code reference enable flag (URS) to “1.”
Transfers the contents of register A to register PU0.
Initializes the watchdog timer flag (WDF1).
Other
operation
相關(guān)PDF資料
PDF描述
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