9
9-19
Ver.0.10
DMAC
9.2 DMAC Related Registers
9.2.4 DMA Destination Address Registers
I
DMA0 Destination Address Register (DM0DA)
I
DMA1 Destination Address Register (DM1DA)
I
DMA2 Destination Address Register (DM2DA)
I
DMA3 Destination Address Register (DM3DA)
I
DMA4 Destination Address Register (DM4DA)
I
DMA5 Destination Address Register (DM5DA)
I
DMA6 Destination Address Register (DM6DA)
I
DMA7 Destination Address Register (DM7DA)
I
DMA8 Destination Address Register (DM8DA)
I
DMA9 Destination Address Register (DM9DA)
<Address: H'0080 0414>
<Address: H'0080 0424>
<Address: H'0080 0434>
<Address: H'0080 0444>
<Address: H'0080 0454>
<Address: H'0080 041C>
<Address: H'0080 042C>
<Address: H'0080 043C>
<Address: H'0080 044C>
<Address: H'0080 045C>
D0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
D15
DM0DA - DM9DA
<When reset : Indeterminate>
D
Bit Name
Function
R
W
0 - 15
DM0DA - DM9DA
A16-A31 of the destination address
(A0-A15 are fixed to H'0080)
Note:
This register must always be accessed in halfwords.
The DMA Destination Address Register is used to set the destination address of DMA transfer in
such a way that D0 corresponds to A16, and D15 corresponds to A31. Because access to this
register is comprised of a current register, the value you get by reading this register is always the
current value.
When DMA transfer finishes (at which the Transfer Count Register underflows), the value in this
register if "Address fixed" is selected, is the same destination address that was set in it before DMA
transfer began; if "Address incremental" is selected, the value in this register is the last transfer
address + 1 (for 8-bit transfer) or the last transfer address + 2 (for 16-bit transfer).
Make sure the DMA Destination Address Register is always accessed in halfwords (16 bits)
beginning with an even address. If accessed in bytes, the value read from this register is
indeterminate.
DM0DA-DM9DA (A16-A31 of the destination address)
By setting this register, specify the destination address of DMA transfer in internal I/O space
ranging from H'0080 0000 to H'0080 FFFF or in the RAM space.
The 16 high-order bits of the destination address (A0-A15) are always fixed to H'0080. Use this
register to set the 16 low-order bits of the destination address (with D0 corresponding to A16, and
D15 corresponding to A31).